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@@ -555,6 +555,7 @@ struct d40_gen_dmac {
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* @reg_val_backup_v4: Backup of registers that only exits on dma40 v3 and
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* later
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* @reg_val_backup_chan: Backup data for standard channel parameter registers.
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+ * @regs_interrupt: Scratch space for registers during interrupt.
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* @gcc_pwr_off_mask: Mask to maintain the channels that can be turned off.
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* @gen_dmac: the struct for generic registers values to represent u8500/8540
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* DMA controller
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@@ -592,6 +593,7 @@ struct d40_base {
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u32 reg_val_backup[BACKUP_REGS_SZ];
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u32 reg_val_backup_v4[BACKUP_REGS_SZ_MAX];
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u32 *reg_val_backup_chan;
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+ u32 *regs_interrupt;
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u16 gcc_pwr_off_mask;
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struct d40_gen_dmac gen_dmac;
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};
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@@ -1637,7 +1639,7 @@ static irqreturn_t d40_handle_interrupt(int irq, void *data)
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struct d40_chan *d40c;
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unsigned long flags;
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struct d40_base *base = data;
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- u32 regs[base->gen_dmac.il_size];
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+ u32 *regs = base->regs_interrupt;
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struct d40_interrupt_lookup *il = base->gen_dmac.il;
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u32 il_size = base->gen_dmac.il_size;
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@@ -3258,13 +3260,22 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev)
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if (!base->lcla_pool.alloc_map)
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goto free_backup_chan;
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+ base->regs_interrupt = kmalloc_array(base->gen_dmac.il_size,
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+ sizeof(*base->regs_interrupt),
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+ GFP_KERNEL);
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+ if (!base->regs_interrupt)
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+ goto free_map;
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+
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base->desc_slab = kmem_cache_create(D40_NAME, sizeof(struct d40_desc),
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0, SLAB_HWCACHE_ALIGN,
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NULL);
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if (base->desc_slab == NULL)
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- goto free_map;
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+ goto free_regs;
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+
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return base;
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+ free_regs:
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+ kfree(base->regs_interrupt);
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free_map:
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kfree(base->lcla_pool.alloc_map);
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free_backup_chan:
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