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@@ -148,10 +148,16 @@ static void mmp_tdma_chan_set_desc(struct mmp_tdma_chan *tdmac, dma_addr_t phys)
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tdmac->reg_base + TDCR);
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}
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+static void mmp_tdma_enable_irq(struct mmp_tdma_chan *tdmac, bool enable)
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+{
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+ if (enable)
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+ writel(TDIMR_COMP, tdmac->reg_base + TDIMR);
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+ else
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+ writel(0, tdmac->reg_base + TDIMR);
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+}
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+
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static void mmp_tdma_enable_chan(struct mmp_tdma_chan *tdmac)
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{
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- /* enable irq */
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- writel(TDIMR_COMP, tdmac->reg_base + TDIMR);
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/* enable dma chan */
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writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
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tdmac->reg_base + TDCR);
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@@ -163,9 +169,6 @@ static void mmp_tdma_disable_chan(struct mmp_tdma_chan *tdmac)
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writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
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tdmac->reg_base + TDCR);
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- /* disable irq */
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- writel(0, tdmac->reg_base + TDIMR);
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-
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tdmac->status = DMA_COMPLETE;
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}
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@@ -434,6 +437,10 @@ static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic(
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i++;
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}
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+ /* enable interrupt */
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+ if (flags & DMA_PREP_INTERRUPT)
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+ mmp_tdma_enable_irq(tdmac, true);
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+
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tdmac->buf_len = buf_len;
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tdmac->period_len = period_len;
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tdmac->pos = 0;
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@@ -455,6 +462,8 @@ static int mmp_tdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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switch (cmd) {
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case DMA_TERMINATE_ALL:
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mmp_tdma_disable_chan(tdmac);
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+ /* disable interrupt */
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+ mmp_tdma_enable_irq(tdmac, false);
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break;
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case DMA_PAUSE:
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mmp_tdma_pause_chan(tdmac);
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