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@@ -44,6 +44,7 @@
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#define INA226_MASK_ENABLE 0x06
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#define INA226_CVRF BIT(3)
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+#define INA219_CNVR BIT(1)
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#define INA2XX_MAX_REGISTERS 8
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@@ -592,6 +593,7 @@ static int ina2xx_work_buffer(struct iio_dev *indio_dev)
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int bit, ret, i = 0;
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s64 time_a, time_b;
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unsigned int alert;
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+ int cnvr_need_clear = 0;
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time_a = iio_get_time_ns(indio_dev);
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@@ -603,22 +605,30 @@ static int ina2xx_work_buffer(struct iio_dev *indio_dev)
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* we check the ConVersionReadyFlag.
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* On hardware that supports using the ALERT pin to toggle a
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* GPIO a triggered buffer could be used instead.
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- * For now, we pay for that extra read of the ALERT register
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+ * For now, we do an extra read of the MASK_ENABLE register (INA226)
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+ * resp. the BUS_VOLTAGE register (INA219).
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*/
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if (!chip->allow_async_readout)
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do {
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- ret = regmap_read(chip->regmap, INA226_MASK_ENABLE,
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- &alert);
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+ if (chip->config->chip_id == ina226) {
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+ ret = regmap_read(chip->regmap,
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+ INA226_MASK_ENABLE, &alert);
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+ alert &= INA226_CVRF;
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+ } else {
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+ ret = regmap_read(chip->regmap,
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+ INA2XX_BUS_VOLTAGE, &alert);
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+ alert &= INA219_CNVR;
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+ cnvr_need_clear = alert;
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+ }
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+
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if (ret < 0)
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return ret;
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- alert &= INA226_CVRF;
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} while (!alert);
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/*
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- * Single register reads: bulk_read will not work with ina226
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- * as there is no auto-increment of the address register for
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- * data length longer than 16bits.
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+ * Single register reads: bulk_read will not work with ina226/219
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+ * as there is no auto-increment of the register pointer.
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*/
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for_each_set_bit(bit, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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@@ -630,6 +640,18 @@ static int ina2xx_work_buffer(struct iio_dev *indio_dev)
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return ret;
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data[i++] = val;
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+
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+ if (INA2XX_SHUNT_VOLTAGE + bit == INA2XX_POWER)
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+ cnvr_need_clear = 0;
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+ }
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+
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+ /* Dummy read on INA219 power register to clear CNVR flag */
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+ if (cnvr_need_clear && chip->config->chip_id == ina219) {
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+ unsigned int val;
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+
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+ ret = regmap_read(chip->regmap, INA2XX_POWER, &val);
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+ if (ret < 0)
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+ return ret;
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}
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time_b = iio_get_time_ns(indio_dev);
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