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@@ -1926,10 +1926,9 @@ static void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *ad
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uint32_t data, default_data;
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uint32_t data, default_data;
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default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
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default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL));
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- if (enable == true)
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- data |= RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK;
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- else
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- data &= ~RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK;
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+ data = REG_SET_FIELD(data, RLC_PG_CNTL,
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+ DYN_PER_CU_PG_ENABLE,
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+ enable ? 1 : 0);
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if(default_data != data)
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if(default_data != data)
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WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
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WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
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}
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}
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