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@@ -2452,18 +2452,37 @@ static void pl011_early_write(struct console *con, const char *s, unsigned n)
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uart_console_write(&dev->port, s, n, pl011_putc);
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}
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+/*
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+ * On non-ACPI systems, earlycon is enabled by specifying
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+ * "earlycon=pl011,<address>" on the kernel command line.
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+ *
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+ * On ACPI ARM64 systems, an "early" console is enabled via the SPCR table,
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+ * by specifying only "earlycon" on the command line. Because it requires
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+ * SPCR, the console starts after ACPI is parsed, which is later than a
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+ * traditional early console.
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+ *
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+ * To get the traditional early console that starts before ACPI is parsed,
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+ * specify the full "earlycon=pl011,<address>" option.
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+ */
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static int __init pl011_early_console_setup(struct earlycon_device *device,
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const char *opt)
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{
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if (!device->port.membase)
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return -ENODEV;
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- device->con->write = qdf2400_e44_present ?
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- qdf2400_e44_early_write : pl011_early_write;
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+ /* On QDF2400 SOCs affected by Erratum 44, the "qdf2400_e44" must
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+ * also be specified, e.g. "earlycon=pl011,<address>,qdf2400_e44".
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+ */
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+ if (!strcmp(device->options, "qdf2400_e44"))
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+ device->con->write = qdf2400_e44_early_write;
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+ else
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+ device->con->write = pl011_early_write;
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+
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return 0;
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}
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OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup);
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OF_EARLYCON_DECLARE(pl011, "arm,sbsa-uart", pl011_early_console_setup);
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+EARLYCON_DECLARE(qdf2400_e44, pl011_early_console_setup);
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#else
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#define AMBA_CONSOLE NULL
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