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@@ -21,10 +21,22 @@
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struct arc_pmu {
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struct pmu pmu;
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+ unsigned int irq;
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int n_counters;
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- unsigned long used_mask[BITS_TO_LONGS(ARC_PERF_MAX_COUNTERS)];
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u64 max_period;
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int ev_hw_idx[PERF_COUNT_ARC_HW_MAX];
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+};
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+
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+struct arc_pmu_cpu {
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+ /*
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+ * A 1 bit for an index indicates that the counter is being used for
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+ * an event. A 0 means that the counter can be used.
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+ */
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+ unsigned long used_mask[BITS_TO_LONGS(ARC_PERF_MAX_COUNTERS)];
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+
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+ /*
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+ * The events that are active on the PMU for the given index.
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+ */
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struct perf_event *act_counter[ARC_PERF_MAX_COUNTERS];
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};
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@@ -67,6 +79,7 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
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}
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static struct arc_pmu *arc_pmu;
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+static DEFINE_PER_CPU(struct arc_pmu_cpu, arc_pmu_cpu);
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/* read counter #idx; note that counter# != event# on ARC! */
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static uint64_t arc_pmu_read_counter(int idx)
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@@ -304,10 +317,12 @@ static void arc_pmu_stop(struct perf_event *event, int flags)
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static void arc_pmu_del(struct perf_event *event, int flags)
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{
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+ struct arc_pmu_cpu *pmu_cpu = this_cpu_ptr(&arc_pmu_cpu);
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+
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arc_pmu_stop(event, PERF_EF_UPDATE);
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- __clear_bit(event->hw.idx, arc_pmu->used_mask);
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+ __clear_bit(event->hw.idx, pmu_cpu->used_mask);
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- arc_pmu->act_counter[event->hw.idx] = 0;
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+ pmu_cpu->act_counter[event->hw.idx] = 0;
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perf_event_update_userpage(event);
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}
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@@ -315,22 +330,23 @@ static void arc_pmu_del(struct perf_event *event, int flags)
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/* allocate hardware counter and optionally start counting */
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static int arc_pmu_add(struct perf_event *event, int flags)
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{
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+ struct arc_pmu_cpu *pmu_cpu = this_cpu_ptr(&arc_pmu_cpu);
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struct hw_perf_event *hwc = &event->hw;
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int idx = hwc->idx;
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- if (__test_and_set_bit(idx, arc_pmu->used_mask)) {
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- idx = find_first_zero_bit(arc_pmu->used_mask,
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+ if (__test_and_set_bit(idx, pmu_cpu->used_mask)) {
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+ idx = find_first_zero_bit(pmu_cpu->used_mask,
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arc_pmu->n_counters);
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if (idx == arc_pmu->n_counters)
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return -EAGAIN;
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- __set_bit(idx, arc_pmu->used_mask);
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+ __set_bit(idx, pmu_cpu->used_mask);
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hwc->idx = idx;
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}
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write_aux_reg(ARC_REG_PCT_INDEX, idx);
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- arc_pmu->act_counter[idx] = event;
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+ pmu_cpu->act_counter[idx] = event;
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if (is_sampling_event(event)) {
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/* Mimic full counter overflow as other arches do */
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@@ -357,7 +373,7 @@ static int arc_pmu_add(struct perf_event *event, int flags)
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static irqreturn_t arc_pmu_intr(int irq, void *dev)
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{
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struct perf_sample_data data;
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- struct arc_pmu *arc_pmu = (struct arc_pmu *)dev;
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+ struct arc_pmu_cpu *pmu_cpu = this_cpu_ptr(&arc_pmu_cpu);
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struct pt_regs *regs;
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int active_ints;
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int idx;
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@@ -369,7 +385,7 @@ static irqreturn_t arc_pmu_intr(int irq, void *dev)
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regs = get_irq_regs();
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for (idx = 0; idx < arc_pmu->n_counters; idx++) {
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- struct perf_event *event = arc_pmu->act_counter[idx];
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+ struct perf_event *event = pmu_cpu->act_counter[idx];
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struct hw_perf_event *hwc;
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if (!(active_ints & (1 << idx)))
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@@ -412,6 +428,17 @@ static irqreturn_t arc_pmu_intr(int irq, void *dev)
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#endif /* CONFIG_ISA_ARCV2 */
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+void arc_cpu_pmu_irq_init(void)
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+{
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+ struct arc_pmu_cpu *pmu_cpu = this_cpu_ptr(&arc_pmu_cpu);
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+
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+ arc_request_percpu_irq(arc_pmu->irq, smp_processor_id(), arc_pmu_intr,
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+ "ARC perf counters", pmu_cpu);
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+
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+ /* Clear all pending interrupt flags */
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+ write_aux_reg(ARC_REG_PCT_INT_ACT, 0xffffffff);
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+}
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+
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static int arc_pmu_device_probe(struct platform_device *pdev)
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{
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struct arc_reg_pct_build pct_bcr;
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@@ -488,18 +515,30 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
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if (has_interrupts) {
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int irq = platform_get_irq(pdev, 0);
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+ unsigned long flags;
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if (irq < 0) {
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pr_err("Cannot get IRQ number for the platform\n");
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return -ENODEV;
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}
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- ret = devm_request_irq(&pdev->dev, irq, arc_pmu_intr, 0,
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- "arc-pmu", arc_pmu);
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- if (ret) {
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- pr_err("could not allocate PMU IRQ\n");
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- return ret;
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- }
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+ arc_pmu->irq = irq;
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+
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+ /*
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+ * arc_cpu_pmu_irq_init() needs to be called on all cores for
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+ * their respective local PMU.
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+ * However we use opencoded on_each_cpu() to ensure it is called
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+ * on core0 first, so that arc_request_percpu_irq() sets up
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+ * AUTOEN etc. Otherwise enable_percpu_irq() fails to enable
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+ * perf IRQ on non master cores.
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+ * see arc_request_percpu_irq()
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+ */
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+ preempt_disable();
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+ local_irq_save(flags);
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+ arc_cpu_pmu_irq_init();
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+ local_irq_restore(flags);
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+ smp_call_function((smp_call_func_t)arc_cpu_pmu_irq_init, 0, 1);
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+ preempt_enable();
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/* Clean all pending interrupt flags */
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write_aux_reg(ARC_REG_PCT_INT_ACT, 0xffffffff);
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