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@@ -1075,6 +1075,106 @@ void i40e_reset_vf(struct i40e_vf *vf, bool flr)
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clear_bit(__I40E_VF_DISABLE, &pf->state);
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}
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+/**
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+ * i40e_reset_all_vfs
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+ * @pf: pointer to the PF structure
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+ * @flr: VFLR was issued or not
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+ *
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+ * Reset all allocated VFs in one go. First, tell the hardware to reset each
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+ * VF, then do all the waiting in one chunk, and finally finish restoring each
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+ * VF after the wait. This is useful during PF routines which need to reset
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+ * all VFs, as otherwise it must perform these resets in a serialized fashion.
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+ **/
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+void i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
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+{
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+ struct i40e_hw *hw = &pf->hw;
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+ struct i40e_vf *vf;
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+ int i, v;
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+ u32 reg;
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+
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+ /* If we don't have any VFs, then there is nothing to reset */
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+ if (!pf->num_alloc_vfs)
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+ return;
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+
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+ /* If VFs have been disabled, there is no need to reset */
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+ if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
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+ return;
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+
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+ /* Begin reset on all VFs at once */
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+ for (v = 0; v < pf->num_alloc_vfs; v++)
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+ i40e_trigger_vf_reset(&pf->vf[v], flr);
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+
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+ /* HW requires some time to make sure it can flush the FIFO for a VF
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+ * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
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+ * sequence to make sure that it has completed. We'll keep track of
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+ * the VFs using a simple iterator that increments once that VF has
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+ * finished resetting.
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+ */
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+ for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
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+ usleep_range(10000, 20000);
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+
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+ /* Check each VF in sequence, beginning with the VF to fail
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+ * the previous check.
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+ */
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+ while (v < pf->num_alloc_vfs) {
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+ vf = &pf->vf[v];
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+ reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
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+ if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
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+ break;
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+
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+ /* If the current VF has finished resetting, move on
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+ * to the next VF in sequence.
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+ */
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+ v++;
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+ }
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+ }
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+
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+ if (flr)
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+ usleep_range(10000, 20000);
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+
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+ /* Display a warning if at least one VF didn't manage to reset in
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+ * time, but continue on with the operation.
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+ */
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+ if (v < pf->num_alloc_vfs)
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+ dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
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+ pf->vf[v].vf_id);
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+ usleep_range(10000, 20000);
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+
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+ /* Begin disabling all the rings associated with VFs, but do not wait
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+ * between each VF.
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+ */
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+ for (v = 0; v < pf->num_alloc_vfs; v++) {
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+ /* On initial reset, we don't have any queues to disable */
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+ if (pf->vf[v].lan_vsi_idx == 0)
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+ continue;
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+
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+ i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
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+ }
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+
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+ /* Now that we've notified HW to disable all of the VF rings, wait
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+ * until they finish.
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+ */
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+ for (v = 0; v < pf->num_alloc_vfs; v++) {
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+ /* On initial reset, we don't have any queues to disable */
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+ if (pf->vf[v].lan_vsi_idx == 0)
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+ continue;
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+
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+ i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
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+ }
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+
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+ /* Hw may need up to 50ms to finish disabling the RX queues. We
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+ * minimize the wait by delaying only once for all VFs.
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+ */
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+ mdelay(50);
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+
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+ /* Finish the reset on each VF */
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+ for (v = 0; v < pf->num_alloc_vfs; v++)
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+ i40e_cleanup_reset_vf(&pf->vf[v]);
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+
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+ i40e_flush(hw);
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+ clear_bit(__I40E_VF_DISABLE, &pf->state);
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+}
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+
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/**
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* i40e_free_vfs
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* @pf: pointer to the PF structure
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Jacob Keller