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@@ -147,6 +147,7 @@
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clocks = <&timer_clk>;
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clocks = <&timer_clk>;
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#dma-cells = <4>;
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#dma-cells = <4>;
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st,mem2mem;
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st,mem2mem;
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+ dma-requests = <8>;
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -164,9 +165,20 @@
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clocks = <&timer_clk>;
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clocks = <&timer_clk>;
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#dma-cells = <4>;
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#dma-cells = <4>;
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st,mem2mem;
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st,mem2mem;
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+ dma-requests = <8>;
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status = "disabled";
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status = "disabled";
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};
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};
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+ dmamux1: dma-router@40020800 {
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+ compatible = "st,stm32h7-dmamux";
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+ reg = <0x40020800 0x1c>;
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+ #dma-cells = <3>;
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+ dma-channels = <16>;
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+ dma-requests = <128>;
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+ dma-masters = <&dma1 &dma2>;
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+ clocks = <&timer_clk>;
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+ };
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+
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adc_12: adc@40022000 {
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adc_12: adc@40022000 {
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compatible = "st,stm32h7-adc-core";
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compatible = "st,stm32h7-adc-core";
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reg = <0x40022000 0x400>;
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reg = <0x40022000 0x400>;
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