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@@ -91,9 +91,7 @@
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DW_IC_INTR_TX_ABRT | \
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DW_IC_INTR_STOP_DET)
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-#define DW_IC_STATUS_ACTIVITY 0x1
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-#define DW_IC_STATUS_TFE BIT(2)
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-#define DW_IC_STATUS_MST_ACTIVITY BIT(5)
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+#define DW_IC_STATUS_ACTIVITY 0x1
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#define DW_IC_SDA_HOLD_RX_SHIFT 16
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#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT)
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@@ -478,25 +476,9 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
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{
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struct i2c_msg *msgs = dev->msgs;
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u32 ic_tar = 0;
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- bool enabled;
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- enabled = dw_readl(dev, DW_IC_ENABLE_STATUS) & 1;
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-
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- if (enabled) {
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- u32 ic_status;
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-
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- /*
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- * Only disable adapter if ic_tar and ic_con can't be
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- * dynamically updated
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- */
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- ic_status = dw_readl(dev, DW_IC_STATUS);
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- if (!dev->dynamic_tar_update_enabled ||
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- (ic_status & DW_IC_STATUS_MST_ACTIVITY) ||
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- !(ic_status & DW_IC_STATUS_TFE)) {
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- __i2c_dw_enable_and_wait(dev, false);
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- enabled = false;
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- }
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- }
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+ /* Disable the adapter */
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+ __i2c_dw_enable_and_wait(dev, false);
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/* if the slave address is ten bit address, enable 10BITADDR */
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if (dev->dynamic_tar_update_enabled) {
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@@ -526,8 +508,8 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
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/* enforce disabled interrupts (due to HW issues) */
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i2c_dw_disable_int(dev);
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- if (!enabled)
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- __i2c_dw_enable(dev, true);
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+ /* Enable the adapter */
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+ __i2c_dw_enable(dev, true);
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/* Clear and enable interrupts */
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dw_readl(dev, DW_IC_CLR_INTR);
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@@ -611,7 +593,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
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if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
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/* avoid rx buffer overrun */
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- if (rx_limit - dev->rx_outstanding <= 0)
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+ if (dev->rx_outstanding >= dev->rx_fifo_depth)
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break;
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dw_writel(dev, cmd | 0x100, DW_IC_DATA_CMD);
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@@ -708,8 +690,7 @@ static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)
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}
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/*
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- * Prepare controller for a transaction and start transfer by calling
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- * i2c_dw_xfer_init()
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+ * Prepare controller for a transaction and call i2c_dw_xfer_msg
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*/
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static int
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i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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@@ -752,13 +733,23 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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goto done;
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}
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+ /*
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+ * We must disable the adapter before returning and signaling the end
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+ * of the current transfer. Otherwise the hardware might continue
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+ * generating interrupts which in turn causes a race condition with
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+ * the following transfer. Needs some more investigation if the
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+ * additional interrupts are a hardware bug or this driver doesn't
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+ * handle them correctly yet.
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+ */
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+ __i2c_dw_enable(dev, false);
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+
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if (dev->msg_err) {
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ret = dev->msg_err;
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goto done;
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}
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/* no error */
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- if (likely(!dev->cmd_err)) {
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+ if (likely(!dev->cmd_err && !dev->status)) {
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ret = num;
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goto done;
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}
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@@ -768,6 +759,11 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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ret = i2c_dw_handle_tx_abort(dev);
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goto done;
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}
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+
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+ if (dev->status)
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+ dev_err(dev->dev,
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+ "transfer terminated early - interrupt latency too high?\n");
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+
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ret = -EIO;
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done:
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@@ -888,19 +884,9 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
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*/
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tx_aborted:
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- if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET))
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- || dev->msg_err) {
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- /*
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- * We must disable interruts before returning and signaling
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- * the end of the current transfer. Otherwise the hardware
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- * might continue generating interrupts for non-existent
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- * transfers.
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- */
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- i2c_dw_disable_int(dev);
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- dw_readl(dev, DW_IC_CLR_INTR);
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-
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+ if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err)
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complete(&dev->cmd_complete);
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- } else if (unlikely(dev->accessor_flags & ACCESS_INTR_MASK)) {
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+ else if (unlikely(dev->accessor_flags & ACCESS_INTR_MASK)) {
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/* workaround to trigger pending interrupt */
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stat = dw_readl(dev, DW_IC_INTR_MASK);
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i2c_dw_disable_int(dev);
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