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@@ -11,26 +11,6 @@
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* g1-g7 and g25-g31 is both input and outputs but on different pins
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* Also note that some bits change pins depending on what interfaces
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* are enabled.
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- *
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- * For ETRAX FS (CONFIG_ETRAXFS):
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- * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
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- * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction
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- * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction
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- * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction
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- * /dev/gpioe minor 5, 18 bit GPIO, each bit can change direction
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- * /dev/leds minor 2, Access to leds depending on kernelconfig
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- *
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- * For ARTPEC-3 (CONFIG_CRIS_MACH_ARTPEC3):
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- * /dev/gpioa minor 0, 32 bit GPIO, each bit can change direction
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- * /dev/gpiob minor 1, 32 bit GPIO, each bit can change direction
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- * /dev/gpioc minor 3, 16 bit GPIO, each bit can change direction
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- * /dev/gpiod minor 4, 32 bit GPIO, input only
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- * /dev/leds minor 2, Access to leds depending on kernelconfig
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- * /dev/pwm0 minor 16, PWM channel 0 on PA30
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- * /dev/pwm1 minor 17, PWM channel 1 on PA31
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- * /dev/pwm2 minor 18, PWM channel 2 on PB26
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- * /dev/ppwm minor 19, PPWM channel
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- *
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*/
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#ifndef _ASM_ETRAXGPIO_H
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#define _ASM_ETRAXGPIO_H
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@@ -40,52 +20,12 @@
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#define ETRAXGPIO_IOCTYPE 43
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/* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */
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-#ifdef CONFIG_ETRAX_ARCH_V10
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#define GPIO_MINOR_A 0
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#define GPIO_MINOR_B 1
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#define GPIO_MINOR_LEDS 2
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#define GPIO_MINOR_G 3
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#define GPIO_MINOR_LAST 3
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#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST
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-#endif
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-
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-#ifdef CONFIG_ETRAXFS
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-#define GPIO_MINOR_A 0
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-#define GPIO_MINOR_B 1
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-#define GPIO_MINOR_LEDS 2
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-#define GPIO_MINOR_C 3
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-#define GPIO_MINOR_D 4
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-#define GPIO_MINOR_E 5
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-#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
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-#define GPIO_MINOR_V 6
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-#define GPIO_MINOR_LAST 6
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-#else
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-#define GPIO_MINOR_LAST 5
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-#endif
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-#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST
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-#endif
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-
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-#ifdef CONFIG_CRIS_MACH_ARTPEC3
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-#define GPIO_MINOR_A 0
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-#define GPIO_MINOR_B 1
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-#define GPIO_MINOR_LEDS 2
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-#define GPIO_MINOR_C 3
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-#define GPIO_MINOR_D 4
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-#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
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-#define GPIO_MINOR_V 6
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-#define GPIO_MINOR_LAST 6
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-#else
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-#define GPIO_MINOR_LAST 4
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-#endif
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-#define GPIO_MINOR_FIRST_PWM 16
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-#define GPIO_MINOR_PWM0 (GPIO_MINOR_FIRST_PWM+0)
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-#define GPIO_MINOR_PWM1 (GPIO_MINOR_FIRST_PWM+1)
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-#define GPIO_MINOR_PWM2 (GPIO_MINOR_FIRST_PWM+2)
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-#define GPIO_MINOR_PPWM (GPIO_MINOR_FIRST_PWM+3)
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-#define GPIO_MINOR_LAST_PWM GPIO_MINOR_PPWM
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-#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST_PWM
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-#endif
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-
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/* supported ioctl _IOC_NR's */
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@@ -139,101 +79,4 @@
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#define IO_SETGET_OUTPUT 0x13 /* bits set in *arg is set to output, */
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/* *arg updated with current output pins. */
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-/* The following ioctl's are applicable to the PWM channels only */
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-
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-#define IO_PWM_SET_MODE 0x20
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-
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-enum io_pwm_mode {
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- PWM_OFF = 0, /* disabled, deallocated */
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- PWM_STANDARD = 1, /* 390 kHz, duty cycle 0..255/256 */
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- PWM_FAST = 2, /* variable freq, w/ 10ns active pulse len */
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- PWM_VARFREQ = 3, /* individually configurable high/low periods */
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- PWM_SOFT = 4 /* software generated */
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-};
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-
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-struct io_pwm_set_mode {
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- enum io_pwm_mode mode;
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-};
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-
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-/* Only for mode PWM_VARFREQ. Period lo/high set in increments of 10ns
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- * from 10ns (value = 0) to 81920ns (value = 8191)
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- * (Resulting frequencies range from 50 MHz (10ns + 10ns) down to
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- * 6.1 kHz (81920ns + 81920ns) at 50% duty cycle, to 12.2 kHz at min/max duty
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- * cycle (81920 + 10ns or 10ns + 81920ns, respectively).)
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- */
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-#define IO_PWM_SET_PERIOD 0x21
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-
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-struct io_pwm_set_period {
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- unsigned int lo; /* 0..8191 */
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- unsigned int hi; /* 0..8191 */
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-};
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-
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-/* Only for modes PWM_STANDARD and PWM_FAST.
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- * For PWM_STANDARD, set duty cycle of 390 kHz PWM output signal, from
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- * 0 (value = 0) to 255/256 (value = 255).
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- * For PWM_FAST, set duty cycle of PWM output signal from
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- * 0% (value = 0) to 100% (value = 255). Output signal in this mode
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- * is a 10ns pulse surrounded by a high or low level depending on duty
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- * cycle (except for 0% and 100% which result in a constant output).
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- * Resulting output frequency varies from 50 MHz at 50% duty cycle,
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- * down to 390 kHz at min/max duty cycle.
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- */
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-#define IO_PWM_SET_DUTY 0x22
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-
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-struct io_pwm_set_duty {
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- int duty; /* 0..255 */
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-};
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-
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-/* Returns information about the latest PWM pulse.
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- * lo: Length of the latest low period, in units of 10ns.
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- * hi: Length of the latest high period, in units of 10ns.
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- * cnt: Time since last detected edge, in units of 10ns.
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- *
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- * The input source to PWM is decied by IO_PWM_SET_INPUT_SRC.
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- *
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- * NOTE: All PWM devices is connected to the same input source.
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- */
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-#define IO_PWM_GET_PERIOD 0x23
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-
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-struct io_pwm_get_period {
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- unsigned int lo;
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- unsigned int hi;
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- unsigned int cnt;
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-};
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-
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-/* Sets the input source for the PWM input. For the src value see the
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- * register description for gio:rw_pwm_in_cfg.
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- *
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- * NOTE: All PWM devices is connected to the same input source.
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- */
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-#define IO_PWM_SET_INPUT_SRC 0x24
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-struct io_pwm_set_input_src {
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- unsigned int src; /* 0..7 */
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-};
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-
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-/* Sets the duty cycles in steps of 1/256, 0 = 0%, 255 = 100% duty cycle */
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-#define IO_PPWM_SET_DUTY 0x25
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-
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-struct io_ppwm_set_duty {
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- int duty; /* 0..255 */
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-};
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-
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-/* Configuraton struct for the IO_PWMCLK_SET_CONFIG ioctl to configure
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- * PWM capable gpio pins:
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- */
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-#define IO_PWMCLK_SETGET_CONFIG 0x26
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-struct gpio_pwmclk_conf {
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- unsigned int gpiopin; /* The pin number based on the opened device */
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- unsigned int baseclk; /* The base clock to use, or sw will select one close*/
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- unsigned int low; /* The number of low periods of the baseclk */
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- unsigned int high; /* The number of high periods of the baseclk */
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-};
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-
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-/* Examples:
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- * To get a symmetric 12 MHz clock without knowing anything about the hardware:
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- * baseclk = 12000000, low = 0, high = 0
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- * To just get info of current setting:
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- * baseclk = 0, low = 0, high = 0, the values will be updated by driver.
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- */
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-
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#endif
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Jesper Nilsson