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drm/amd/powerplay: fix a bug on updating sclk for Tonga

Update sclk smc table rather than mclk smc table for sclk updates.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang 9 年之前
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共有 1 个文件被更改,包括 1 次插入1 次删除
  1. 1 1
      drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c

+ 1 - 1
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c

@@ -5445,7 +5445,7 @@ static int tonga_populate_and_upload_sclk_mclk_dpm_levels(struct pp_hwmgr *hwmgr
 	}
 
 	if (data->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK)) {
-		result = tonga_populate_all_memory_levels(hwmgr);
+		result = tonga_populate_all_graphic_levels(hwmgr);
 		PP_ASSERT_WITH_CODE((0 == result),
 			"Failed to populate SCLK during PopulateNewDPMClocksStates Function!",
 			return result);