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@@ -4311,106 +4311,6 @@ void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p)
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#undef GET_STAT_COM
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}
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-/**
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- * t4_wol_magic_enable - enable/disable magic packet WoL
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- * @adap: the adapter
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- * @port: the physical port index
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- * @addr: MAC address expected in magic packets, %NULL to disable
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- *
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- * Enables/disables magic packet wake-on-LAN for the selected port.
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- */
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-void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
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- const u8 *addr)
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-{
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- u32 mag_id_reg_l, mag_id_reg_h, port_cfg_reg;
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-
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- if (is_t4(adap->params.chip)) {
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- mag_id_reg_l = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_LO);
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- mag_id_reg_h = PORT_REG(port, XGMAC_PORT_MAGIC_MACID_HI);
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- port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2_A);
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- } else {
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- mag_id_reg_l = T5_PORT_REG(port, MAC_PORT_MAGIC_MACID_LO);
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- mag_id_reg_h = T5_PORT_REG(port, MAC_PORT_MAGIC_MACID_HI);
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- port_cfg_reg = T5_PORT_REG(port, MAC_PORT_CFG2_A);
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- }
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-
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- if (addr) {
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- t4_write_reg(adap, mag_id_reg_l,
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- (addr[2] << 24) | (addr[3] << 16) |
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- (addr[4] << 8) | addr[5]);
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- t4_write_reg(adap, mag_id_reg_h,
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- (addr[0] << 8) | addr[1]);
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- }
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- t4_set_reg_field(adap, port_cfg_reg, MAGICEN_F,
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- addr ? MAGICEN_F : 0);
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-}
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-
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-/**
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- * t4_wol_pat_enable - enable/disable pattern-based WoL
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- * @adap: the adapter
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- * @port: the physical port index
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- * @map: bitmap of which HW pattern filters to set
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- * @mask0: byte mask for bytes 0-63 of a packet
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- * @mask1: byte mask for bytes 64-127 of a packet
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- * @crc: Ethernet CRC for selected bytes
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- * @enable: enable/disable switch
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- *
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- * Sets the pattern filters indicated in @map to mask out the bytes
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- * specified in @mask0/@mask1 in received packets and compare the CRC of
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- * the resulting packet against @crc. If @enable is %true pattern-based
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- * WoL is enabled, otherwise disabled.
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- */
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-int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
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- u64 mask0, u64 mask1, unsigned int crc, bool enable)
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-{
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- int i;
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- u32 port_cfg_reg;
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-
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- if (is_t4(adap->params.chip))
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- port_cfg_reg = PORT_REG(port, XGMAC_PORT_CFG2_A);
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- else
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- port_cfg_reg = T5_PORT_REG(port, MAC_PORT_CFG2_A);
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-
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- if (!enable) {
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- t4_set_reg_field(adap, port_cfg_reg, PATEN_F, 0);
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- return 0;
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- }
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- if (map > 0xff)
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- return -EINVAL;
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-
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-#define EPIO_REG(name) \
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- (is_t4(adap->params.chip) ? \
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- PORT_REG(port, XGMAC_PORT_EPIO_##name##_A) : \
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- T5_PORT_REG(port, MAC_PORT_EPIO_##name##_A))
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-
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- t4_write_reg(adap, EPIO_REG(DATA1), mask0 >> 32);
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- t4_write_reg(adap, EPIO_REG(DATA2), mask1);
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- t4_write_reg(adap, EPIO_REG(DATA3), mask1 >> 32);
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-
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- for (i = 0; i < NWOL_PAT; i++, map >>= 1) {
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- if (!(map & 1))
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- continue;
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-
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- /* write byte masks */
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- t4_write_reg(adap, EPIO_REG(DATA0), mask0);
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- t4_write_reg(adap, EPIO_REG(OP), ADDRESS_V(i) | EPIOWR_F);
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- t4_read_reg(adap, EPIO_REG(OP)); /* flush */
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- if (t4_read_reg(adap, EPIO_REG(OP)) & SF_BUSY_F)
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- return -ETIMEDOUT;
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-
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- /* write CRC */
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- t4_write_reg(adap, EPIO_REG(DATA0), crc);
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- t4_write_reg(adap, EPIO_REG(OP), ADDRESS_V(i + 32) | EPIOWR_F);
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- t4_read_reg(adap, EPIO_REG(OP)); /* flush */
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- if (t4_read_reg(adap, EPIO_REG(OP)) & SF_BUSY_F)
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- return -ETIMEDOUT;
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- }
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-#undef EPIO_REG
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-
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- t4_set_reg_field(adap, PORT_REG(port, XGMAC_PORT_CFG2_A), 0, PATEN_F);
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- return 0;
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-}
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-
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/* t4_mk_filtdelwr - create a delete filter WR
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* @ftid: the filter ID
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* @wr: the filter work request to populate
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