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@@ -686,16 +686,10 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
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int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
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{
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- int ret;
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+ int ret = 0;
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request->ringbuf = request->ctx->engine[request->ring->id].ringbuf;
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- if (request->ctx != request->i915->kernel_context) {
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- ret = intel_lr_context_pin(request);
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- if (ret)
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- return ret;
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- }
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-
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if (i915.enable_guc_submission) {
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/*
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* Check that the GuC has space for the request before
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@@ -709,7 +703,10 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
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return ret;
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}
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- return 0;
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+ if (request->ctx != request->i915->kernel_context)
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+ ret = intel_lr_context_pin(request);
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+
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+ return ret;
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}
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static int logical_ring_wait_for_space(struct drm_i915_gem_request *req,
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@@ -2391,22 +2388,21 @@ void intel_lr_context_free(struct intel_context *ctx)
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{
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int i;
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- for (i = 0; i < I915_NUM_RINGS; i++) {
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+ for (i = I915_NUM_RINGS; --i >= 0; ) {
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+ struct intel_ringbuffer *ringbuf = ctx->engine[i].ringbuf;
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struct drm_i915_gem_object *ctx_obj = ctx->engine[i].state;
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- if (ctx_obj) {
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- struct intel_ringbuffer *ringbuf =
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- ctx->engine[i].ringbuf;
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- struct intel_engine_cs *ring = ringbuf->ring;
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+ if (!ctx_obj)
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+ continue;
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- if (ctx == ctx->i915->kernel_context) {
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- intel_unpin_ringbuffer_obj(ringbuf);
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- i915_gem_object_ggtt_unpin(ctx_obj);
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- }
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- WARN_ON(ctx->engine[ring->id].pin_count);
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- intel_ringbuffer_free(ringbuf);
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- drm_gem_object_unreference(&ctx_obj->base);
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+ if (ctx == ctx->i915->kernel_context) {
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+ intel_unpin_ringbuffer_obj(ringbuf);
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+ i915_gem_object_ggtt_unpin(ctx_obj);
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}
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+
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+ WARN_ON(ctx->engine[i].pin_count);
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+ intel_ringbuffer_free(ringbuf);
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+ drm_gem_object_unreference(&ctx_obj->base);
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}
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}
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@@ -2481,7 +2477,7 @@ static void lrc_setup_hardware_status_page(struct intel_engine_cs *ring,
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*/
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int intel_lr_context_deferred_alloc(struct intel_context *ctx,
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- struct intel_engine_cs *ring)
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+ struct intel_engine_cs *ring)
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{
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struct drm_device *dev = ring->dev;
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struct drm_i915_gem_object *ctx_obj;
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