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@@ -234,7 +234,7 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
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* @mode_bits: flags understood by this controller driver
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* @bits_per_word_mask: A mask indicating which values of bits_per_word are
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* supported by the driver. Bit n indicates that a bits_per_word n+1 is
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- * suported. If set, the SPI core will reject any transfer with an
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+ * supported. If set, the SPI core will reject any transfer with an
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* unsupported bits_per_word. If not set, this value is simply ignored,
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* and it's up to the individual driver to perform any validation.
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* @min_speed_hz: Lowest supported transfer speed
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@@ -259,7 +259,7 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
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* @cur_msg: the currently in-flight message
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* @cur_msg_prepared: spi_prepare_message was called for the currently
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* in-flight message
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- * @xfer_completion: used by core tranfer_one_message()
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+ * @xfer_completion: used by core transfer_one_message()
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* @busy: message pump is busy
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* @running: message pump is running
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* @rt: whether this queue is set to run as a realtime task
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@@ -493,7 +493,7 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
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* @rx_buf: data to be read (dma-safe memory), or NULL
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* @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
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* @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
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- * @tx_nbits: number of bits used for writting. If 0 the default
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+ * @tx_nbits: number of bits used for writing. If 0 the default
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* (SPI_NBITS_SINGLE) is used.
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* @rx_nbits: number of bits used for reading. If 0 the default
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* (SPI_NBITS_SINGLE) is used.
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@@ -551,7 +551,7 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
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* by the results of previous messages and where the whole transaction
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* ends when the chipselect goes intactive.
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*
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- * When SPI can transfer in 1x,2x or 4x. It can get this tranfer information
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+ * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
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* from device through @tx_nbits and @rx_nbits. In Bi-direction, these
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* two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
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* SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
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