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@@ -662,7 +662,7 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
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1, 0);
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acp_dma_start(acp_mmio, SYSRAM_TO_ACP_CH_NUM, false);
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- snd_pcm_period_elapsed(irq_data->play_stream);
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+ snd_pcm_period_elapsed(irq_data->play_i2ssp_stream);
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acp_reg_write((intr_flag & BIT(ACP_TO_I2S_DMA_CH_NUM)) << 16,
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acp_mmio, mmACP_EXTERNAL_INTR_STAT);
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@@ -685,7 +685,7 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
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if ((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) != 0) {
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valid_irq = true;
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- snd_pcm_period_elapsed(irq_data->capture_stream);
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+ snd_pcm_period_elapsed(irq_data->capture_i2ssp_stream);
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acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) << 16,
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acp_mmio, mmACP_EXTERNAL_INTR_STAT);
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}
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@@ -743,11 +743,11 @@ static int acp_dma_open(struct snd_pcm_substream *substream)
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* This enablement is not required for another stream, if current
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* stream is not closed
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*/
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- if (!intr_data->play_stream && !intr_data->capture_stream)
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+ if (!intr_data->play_i2ssp_stream && !intr_data->capture_i2ssp_stream)
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acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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- intr_data->play_stream = substream;
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+ intr_data->play_i2ssp_stream = substream;
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/* For Stoney, Memory gating is disabled,i.e SRAM Banks
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* won't be turned off. The default state for SRAM banks is ON.
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* Setting SRAM bank state code skipped for STONEY platform.
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@@ -758,7 +758,7 @@ static int acp_dma_open(struct snd_pcm_substream *substream)
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bank, true);
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}
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} else {
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- intr_data->capture_stream = substream;
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+ intr_data->capture_i2ssp_stream = substream;
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if (intr_data->asic_type != CHIP_STONEY) {
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for (bank = 5; bank <= 8; bank++)
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acp_set_sram_bank_state(intr_data->acp_mmio,
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@@ -857,11 +857,11 @@ static snd_pcm_uframes_t acp_dma_pointer(struct snd_pcm_substream *substream)
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bytescount = acp_get_byte_count(rtd->acp_mmio, substream->stream);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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- if (bytescount > rtd->renderbytescount)
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- bytescount = bytescount - rtd->renderbytescount;
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+ if (bytescount > rtd->i2ssp_renderbytescount)
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+ bytescount = bytescount - rtd->i2ssp_renderbytescount;
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} else {
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- if (bytescount > rtd->capturebytescount)
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- bytescount = bytescount - rtd->capturebytescount;
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+ if (bytescount > rtd->i2ssp_capturebytescount)
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+ bytescount = bytescount - rtd->i2ssp_capturebytescount;
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}
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pos = do_div(bytescount, buffersize);
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return bytes_to_frames(runtime, pos);
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@@ -917,8 +917,8 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd)
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bytescount = acp_get_byte_count(rtd->acp_mmio,
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substream->stream);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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- if (rtd->renderbytescount == 0)
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- rtd->renderbytescount = bytescount;
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+ if (rtd->i2ssp_renderbytescount == 0)
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+ rtd->i2ssp_renderbytescount = bytescount;
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acp_dma_start(rtd->acp_mmio,
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SYSRAM_TO_ACP_CH_NUM, false);
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while (acp_reg_read(rtd->acp_mmio, mmACP_DMA_CH_STS) &
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@@ -935,8 +935,8 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd)
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ACP_TO_I2S_DMA_CH_NUM, true);
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} else {
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- if (rtd->capturebytescount == 0)
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- rtd->capturebytescount = bytescount;
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+ if (rtd->i2ssp_capturebytescount == 0)
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+ rtd->i2ssp_capturebytescount = bytescount;
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acp_dma_start(rtd->acp_mmio,
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I2S_TO_ACP_DMA_CH_NUM, true);
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}
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@@ -953,11 +953,11 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd)
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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ret = acp_dma_stop(rtd->acp_mmio,
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ACP_TO_I2S_DMA_CH_NUM);
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- rtd->renderbytescount = 0;
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+ rtd->i2ssp_renderbytescount = 0;
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} else {
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ret = acp_dma_stop(rtd->acp_mmio,
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I2S_TO_ACP_DMA_CH_NUM);
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- rtd->capturebytescount = 0;
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+ rtd->i2ssp_capturebytescount = 0;
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}
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break;
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default:
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@@ -1003,7 +1003,7 @@ static int acp_dma_close(struct snd_pcm_substream *substream)
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kfree(rtd);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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- adata->play_stream = NULL;
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+ adata->play_i2ssp_stream = NULL;
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/* For Stoney, Memory gating is disabled,i.e SRAM Banks
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* won't be turned off. The default state for SRAM banks is ON.
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* Setting SRAM bank state code skipped for STONEY platform.
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@@ -1015,7 +1015,7 @@ static int acp_dma_close(struct snd_pcm_substream *substream)
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false);
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}
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} else {
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- adata->capture_stream = NULL;
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+ adata->capture_i2ssp_stream = NULL;
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if (adata->asic_type != CHIP_STONEY) {
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for (bank = 5; bank <= 8; bank++)
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acp_set_sram_bank_state(adata->acp_mmio, bank,
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@@ -1026,7 +1026,7 @@ static int acp_dma_close(struct snd_pcm_substream *substream)
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/* Disable ACP irq, when the current stream is being closed and
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* another stream is also not active.
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*/
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- if (!adata->play_stream && !adata->capture_stream)
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+ if (!adata->play_i2ssp_stream && !adata->capture_i2ssp_stream)
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acp_reg_write(0, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
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return 0;
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@@ -1076,8 +1076,9 @@ static int acp_audio_probe(struct platform_device *pdev)
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* and device doesn't generate any interrupts.
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*/
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- audio_drv_data->play_stream = NULL;
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- audio_drv_data->capture_stream = NULL;
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+ audio_drv_data->play_i2ssp_stream = NULL;
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+ audio_drv_data->capture_i2ssp_stream = NULL;
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+
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audio_drv_data->asic_type = *pdata;
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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@@ -1141,7 +1142,7 @@ static int acp_pcm_resume(struct device *dev)
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return status;
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}
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- if (adata->play_stream && adata->play_stream->runtime) {
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+ if (adata->play_i2ssp_stream && adata->play_i2ssp_stream->runtime) {
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/* For Stoney, Memory gating is disabled,i.e SRAM Banks
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* won't be turned off. The default state for SRAM banks is ON.
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* Setting SRAM bank state code skipped for STONEY platform.
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@@ -1152,17 +1153,17 @@ static int acp_pcm_resume(struct device *dev)
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true);
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}
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config_acp_dma(adata->acp_mmio,
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- adata->play_stream->runtime->private_data,
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+ adata->play_i2ssp_stream->runtime->private_data,
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adata->asic_type);
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}
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- if (adata->capture_stream && adata->capture_stream->runtime) {
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+ if (adata->capture_i2ssp_stream && adata->capture_i2ssp_stream->runtime) {
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if (adata->asic_type != CHIP_STONEY) {
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for (bank = 5; bank <= 8; bank++)
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acp_set_sram_bank_state(adata->acp_mmio, bank,
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true);
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}
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config_acp_dma(adata->acp_mmio,
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- adata->capture_stream->runtime->private_data,
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+ adata->capture_i2ssp_stream->runtime->private_data,
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adata->asic_type);
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}
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acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
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