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@@ -241,7 +241,8 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
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domain_start = bo->rdev->mc.vram_start;
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domain_start = bo->rdev->mc.vram_start;
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else
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else
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domain_start = bo->rdev->mc.gtt_start;
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domain_start = bo->rdev->mc.gtt_start;
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- WARN_ON_ONCE((*gpu_addr - domain_start) > max_offset);
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+ WARN_ON_ONCE(max_offset <
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+ (radeon_bo_gpu_offset(bo) - domain_start));
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}
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}
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return 0;
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return 0;
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