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@@ -424,9 +424,11 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
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bo->pin_count = 1;
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bo->pin_count = 1;
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if (gpu_addr != NULL)
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if (gpu_addr != NULL)
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*gpu_addr = amdgpu_bo_gpu_offset(bo);
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*gpu_addr = amdgpu_bo_gpu_offset(bo);
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- if (domain == AMDGPU_GEM_DOMAIN_VRAM)
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+ if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
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bo->adev->vram_pin_size += amdgpu_bo_size(bo);
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bo->adev->vram_pin_size += amdgpu_bo_size(bo);
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- else
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+ if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
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+ bo->adev->invisible_pin_size += amdgpu_bo_size(bo);
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+ } else
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bo->adev->gart_pin_size += amdgpu_bo_size(bo);
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bo->adev->gart_pin_size += amdgpu_bo_size(bo);
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} else {
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} else {
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dev_err(bo->adev->dev, "%p pin failed\n", bo);
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dev_err(bo->adev->dev, "%p pin failed\n", bo);
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@@ -456,9 +458,11 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
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}
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}
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
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if (likely(r == 0)) {
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if (likely(r == 0)) {
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- if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
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+ if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
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bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
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bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
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- else
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+ if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
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+ bo->adev->invisible_pin_size -= amdgpu_bo_size(bo);
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+ } else
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bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
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bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
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} else {
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} else {
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dev_err(bo->adev->dev, "%p validate failed for unpin\n", bo);
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dev_err(bo->adev->dev, "%p validate failed for unpin\n", bo);
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