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@@ -105,6 +105,13 @@
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/* Device NMI register */
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#define DEVICE_SET_NMI_REG 0x00a01c30
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+/*
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+ * Device reset for family 8000
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+ * write to bit 24 in order to reset the CPU
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+*/
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+#define RELEASE_CPU_RESET (0x300C)
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+#define RELEASE_CPU_RESET_BIT BIT(24)
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+
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/*****************************************************************************
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* 7000/3000 series SHR DTS addresses *
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*****************************************************************************/
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