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@@ -26,6 +26,7 @@
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#define MUSB_DMA_NUM_CHANNELS 15
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#define MUSB_DMA_NUM_CHANNELS 15
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+#define DA8XX_USB_MODE 0x10
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#define DA8XX_USB_AUTOREQ 0x14
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#define DA8XX_USB_AUTOREQ 0x14
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#define DA8XX_USB_TEARDOWN 0x1c
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#define DA8XX_USB_TEARDOWN 0x1c
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@@ -41,6 +42,9 @@ struct cppi41_dma_controller {
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u32 tdown_reg;
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u32 tdown_reg;
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u32 autoreq_reg;
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u32 autoreq_reg;
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+
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+ void (*set_dma_mode)(struct cppi41_dma_channel *cppi41_channel,
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+ unsigned int mode);
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};
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};
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static void save_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
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static void save_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
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@@ -355,6 +359,32 @@ static void cppi41_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
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}
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}
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}
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}
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+static void da8xx_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
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+ unsigned int mode)
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+{
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+ struct cppi41_dma_controller *controller = cppi41_channel->controller;
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+ struct musb *musb = controller->controller.musb;
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+ unsigned int shift;
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+ u32 port;
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+ u32 new_mode;
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+ u32 old_mode;
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+
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+ old_mode = controller->tx_mode;
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+ port = cppi41_channel->port_num;
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+
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+ shift = (port - 1) * 4;
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+ if (!cppi41_channel->is_tx)
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+ shift += 16;
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+ new_mode = old_mode & ~(3 << shift);
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+ new_mode |= mode << shift;
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+
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+ if (new_mode == old_mode)
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+ return;
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+ controller->tx_mode = new_mode;
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+ musb_writel(musb->ctrl_base, DA8XX_USB_MODE, new_mode);
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+}
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+
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+
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static void cppi41_set_autoreq_mode(struct cppi41_dma_channel *cppi41_channel,
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static void cppi41_set_autoreq_mode(struct cppi41_dma_channel *cppi41_channel,
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unsigned mode)
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unsigned mode)
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{
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{
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@@ -379,6 +409,7 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
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dma_addr_t dma_addr, u32 len)
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dma_addr_t dma_addr, u32 len)
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{
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{
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struct cppi41_dma_channel *cppi41_channel = channel->private_data;
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struct cppi41_dma_channel *cppi41_channel = channel->private_data;
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+ struct cppi41_dma_controller *controller = cppi41_channel->controller;
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struct dma_chan *dc = cppi41_channel->dc;
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struct dma_chan *dc = cppi41_channel->dc;
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struct dma_async_tx_descriptor *dma_desc;
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struct dma_async_tx_descriptor *dma_desc;
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enum dma_transfer_direction direction;
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enum dma_transfer_direction direction;
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@@ -404,7 +435,7 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
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musb_writel(musb->ctrl_base,
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musb_writel(musb->ctrl_base,
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RNDIS_REG(cppi41_channel->port_num), len);
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RNDIS_REG(cppi41_channel->port_num), len);
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/* gen rndis */
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/* gen rndis */
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- cppi41_set_dma_mode(cppi41_channel,
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+ controller->set_dma_mode(cppi41_channel,
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EP_MODE_DMA_GEN_RNDIS);
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EP_MODE_DMA_GEN_RNDIS);
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/* auto req */
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/* auto req */
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@@ -413,14 +444,15 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
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} else {
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} else {
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musb_writel(musb->ctrl_base,
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musb_writel(musb->ctrl_base,
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RNDIS_REG(cppi41_channel->port_num), 0);
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RNDIS_REG(cppi41_channel->port_num), 0);
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- cppi41_set_dma_mode(cppi41_channel,
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+ controller->set_dma_mode(cppi41_channel,
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EP_MODE_DMA_TRANSPARENT);
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EP_MODE_DMA_TRANSPARENT);
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cppi41_set_autoreq_mode(cppi41_channel,
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cppi41_set_autoreq_mode(cppi41_channel,
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EP_MODE_AUTOREQ_NONE);
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EP_MODE_AUTOREQ_NONE);
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}
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}
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} else {
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} else {
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/* fallback mode */
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/* fallback mode */
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- cppi41_set_dma_mode(cppi41_channel, EP_MODE_DMA_TRANSPARENT);
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+ controller->set_dma_mode(cppi41_channel,
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+ EP_MODE_DMA_TRANSPARENT);
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cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
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cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
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len = min_t(u32, packet_sz, len);
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len = min_t(u32, packet_sz, len);
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}
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}
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@@ -737,9 +769,11 @@ cppi41_dma_controller_create(struct musb *musb, void __iomem *base)
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if (musb->io.quirks & MUSB_DA8XX) {
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if (musb->io.quirks & MUSB_DA8XX) {
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controller->tdown_reg = DA8XX_USB_TEARDOWN;
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controller->tdown_reg = DA8XX_USB_TEARDOWN;
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controller->autoreq_reg = DA8XX_USB_AUTOREQ;
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controller->autoreq_reg = DA8XX_USB_AUTOREQ;
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+ controller->set_dma_mode = da8xx_set_dma_mode;
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} else {
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} else {
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controller->tdown_reg = USB_TDOWN;
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controller->tdown_reg = USB_TDOWN;
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controller->autoreq_reg = USB_CTRL_AUTOREQ;
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controller->autoreq_reg = USB_CTRL_AUTOREQ;
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+ controller->set_dma_mode = cppi41_set_dma_mode;
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}
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}
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ret = cppi41_dma_controller_start(controller);
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ret = cppi41_dma_controller_start(controller);
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