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@@ -931,7 +931,7 @@ static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
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HDMI_PHY_CONF0_SELDIPIF_MASK);
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HDMI_PHY_CONF0_SELDIPIF_MASK);
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}
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}
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-static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
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+static int hdmi_phy_configure(struct dw_hdmi *hdmi,
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unsigned char res, int cscon)
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unsigned char res, int cscon)
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{
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{
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unsigned res_idx;
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unsigned res_idx;
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@@ -941,9 +941,6 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
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const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
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const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
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const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
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const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
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- if (prep)
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- return -EINVAL;
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-
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switch (res) {
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switch (res) {
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case 0: /* color resolution 0 is 8 bit colour depth */
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case 0: /* color resolution 0 is 8 bit colour depth */
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case 8:
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case 8:
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@@ -1072,7 +1069,7 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
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dw_hdmi_phy_enable_powerdown(hdmi, true);
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dw_hdmi_phy_enable_powerdown(hdmi, true);
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/* Enable CSC */
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/* Enable CSC */
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- ret = hdmi_phy_configure(hdmi, 0, 8, cscon);
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+ ret = hdmi_phy_configure(hdmi, 8, cscon);
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if (ret)
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if (ret)
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return ret;
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return ret;
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}
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}
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