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@@ -1487,36 +1487,6 @@ error:
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return r;
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}
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-/**
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- * amdgpu_vm_find_entry - find the entry for an address
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- *
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- * @p: see amdgpu_pte_update_params definition
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- * @addr: virtual address in question
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- * @entry: resulting entry or NULL
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- * @parent: parent entry
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- *
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- * Find the vm_pt entry and it's parent for the given address.
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- */
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-void amdgpu_vm_get_entry(struct amdgpu_pte_update_params *p, uint64_t addr,
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- struct amdgpu_vm_pt **entry,
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- struct amdgpu_vm_pt **parent)
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-{
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- unsigned level = p->adev->vm_manager.root_level;
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-
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- *parent = NULL;
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- *entry = &p->vm->root;
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- while ((*entry)->entries) {
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- unsigned shift = amdgpu_vm_level_shift(p->adev, level++);
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-
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- *parent = *entry;
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- *entry = &(*entry)->entries[addr >> shift];
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- addr &= (1ULL << shift) - 1;
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- }
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-
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- if (level != AMDGPU_VM_PTB)
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- *entry = NULL;
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-}
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-
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/**
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* amdgpu_vm_handle_huge_pages - handle updating the PD with huge pages
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*
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@@ -1580,36 +1550,34 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
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{
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struct amdgpu_device *adev = params->adev;
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const uint64_t mask = AMDGPU_VM_PTE_COUNT(adev) - 1;
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-
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- uint64_t addr, pe_start;
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- struct amdgpu_bo *pt;
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- unsigned nptes;
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+ struct amdgpu_vm_pt_cursor cursor;
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/* walk over the address space and update the page tables */
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- for (addr = start; addr < end; addr += nptes,
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- dst += nptes * AMDGPU_GPU_PAGE_SIZE) {
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- struct amdgpu_vm_pt *entry, *parent;
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+ for_each_amdgpu_vm_pt_leaf(adev, params->vm, start, end - 1, cursor) {
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+ struct amdgpu_bo *pt = cursor.entry->base.bo;
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+ uint64_t pe_start;
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+ unsigned nptes;
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- amdgpu_vm_get_entry(params, addr, &entry, &parent);
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- if (!entry)
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+ if (!pt || cursor.level != AMDGPU_VM_PTB)
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return -ENOENT;
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- if ((addr & ~mask) == (end & ~mask))
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- nptes = end - addr;
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+ if ((cursor.pfn & ~mask) == (end & ~mask))
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+ nptes = end - cursor.pfn;
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else
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- nptes = AMDGPU_VM_PTE_COUNT(adev) - (addr & mask);
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+ nptes = AMDGPU_VM_PTE_COUNT(adev) - (cursor.pfn & mask);
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- amdgpu_vm_handle_huge_pages(params, entry, parent,
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+ amdgpu_vm_handle_huge_pages(params, cursor.entry, cursor.parent,
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nptes, dst, flags);
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/* We don't need to update PTEs for huge pages */
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- if (entry->huge)
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+ if (cursor.entry->huge) {
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+ dst += nptes * AMDGPU_GPU_PAGE_SIZE;
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continue;
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+ }
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- pt = entry->base.bo;
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- pe_start = (addr & mask) * 8;
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+ pe_start = (cursor.pfn & mask) * 8;
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amdgpu_vm_update_func(params, pt, pe_start, dst, nptes,
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AMDGPU_GPU_PAGE_SIZE, flags);
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-
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+ dst += nptes * AMDGPU_GPU_PAGE_SIZE;
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}
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return 0;
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