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@@ -266,6 +266,32 @@ static u64 cs_etm_get_config(struct auxtrace_record *itr)
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return config;
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}
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+#ifndef BIT
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+#define BIT(N) (1UL << (N))
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+#endif
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+
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+static u64 cs_etmv4_get_config(struct auxtrace_record *itr)
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+{
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+ u64 config = 0;
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+ u64 config_opts = 0;
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+
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+ /*
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+ * The perf event variable config bits represent both
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+ * the command line options and register programming
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+ * bits in ETMv3/PTM. For ETMv4 we must remap options
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+ * to real bits
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+ */
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+ config_opts = cs_etm_get_config(itr);
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+ if (config_opts & BIT(ETM_OPT_CYCACC))
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+ config |= BIT(ETM4_CFG_BIT_CYCACC);
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+ if (config_opts & BIT(ETM_OPT_TS))
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+ config |= BIT(ETM4_CFG_BIT_TS);
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+ if (config_opts & BIT(ETM_OPT_RETSTK))
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+ config |= BIT(ETM4_CFG_BIT_RETSTK);
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+
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+ return config;
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+}
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+
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static size_t
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cs_etm_info_priv_size(struct auxtrace_record *itr __maybe_unused,
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struct perf_evlist *evlist __maybe_unused)
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@@ -363,7 +389,7 @@ static void cs_etm_get_metadata(int cpu, u32 *offset,
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magic = __perf_cs_etmv4_magic;
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/* Get trace configuration register */
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info->priv[*offset + CS_ETMV4_TRCCONFIGR] =
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- cs_etm_get_config(itr);
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+ cs_etmv4_get_config(itr);
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/* Get traceID from the framework */
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info->priv[*offset + CS_ETMV4_TRCTRACEIDR] =
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coresight_get_trace_id(cpu);
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