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@@ -0,0 +1,617 @@
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+/* Copyright 2009 - 2016 Freescale Semiconductor, Inc.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ * * Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ * * Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the distribution.
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+ * * Neither the name of Freescale Semiconductor nor the
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+ * names of its contributors may be used to endorse or promote products
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+ * derived from this software without specific prior written permission.
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+ *
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+ * ALTERNATIVELY, this software may be distributed under the terms of the
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+ * GNU General Public License ("GPL") as published by the Free Software
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+ * Foundation, either version 2 of that License or (at your option) any
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+ * later version.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+#include "qman_test.h"
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+
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+#include <linux/dma-mapping.h>
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+#include <linux/delay.h>
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+
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+/*
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+ * Algorithm:
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+ *
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+ * Each cpu will have HP_PER_CPU "handlers" set up, each of which incorporates
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+ * an rx/tx pair of FQ objects (both of which are stashed on dequeue). The
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+ * organisation of FQIDs is such that the HP_PER_CPU*NUM_CPUS handlers will
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+ * shuttle a "hot potato" frame around them such that every forwarding action
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+ * moves it from one cpu to another. (The use of more than one handler per cpu
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+ * is to allow enough handlers/FQs to truly test the significance of caching -
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+ * ie. when cache-expiries are occurring.)
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+ *
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+ * The "hot potato" frame content will be HP_NUM_WORDS*4 bytes in size, and the
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+ * first and last words of the frame data will undergo a transformation step on
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+ * each forwarding action. To achieve this, each handler will be assigned a
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+ * 32-bit "mixer", that is produced using a 32-bit LFSR. When a frame is
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+ * received by a handler, the mixer of the expected sender is XOR'd into all
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+ * words of the entire frame, which is then validated against the original
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+ * values. Then, before forwarding, the entire frame is XOR'd with the mixer of
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+ * the current handler. Apart from validating that the frame is taking the
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+ * expected path, this also provides some quasi-realistic overheads to each
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+ * forwarding action - dereferencing *all* the frame data, computation, and
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+ * conditional branching. There is a "special" handler designated to act as the
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+ * instigator of the test by creating an enqueuing the "hot potato" frame, and
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+ * to determine when the test has completed by counting HP_LOOPS iterations.
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+ *
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+ * Init phases:
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+ *
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+ * 1. prepare each cpu's 'hp_cpu' struct using on_each_cpu(,,1) and link them
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+ * into 'hp_cpu_list'. Specifically, set processor_id, allocate HP_PER_CPU
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+ * handlers and link-list them (but do no other handler setup).
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+ *
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+ * 2. scan over 'hp_cpu_list' HP_PER_CPU times, the first time sets each
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+ * hp_cpu's 'iterator' to point to its first handler. With each loop,
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+ * allocate rx/tx FQIDs and mixer values to the hp_cpu's iterator handler
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+ * and advance the iterator for the next loop. This includes a final fixup,
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+ * which connects the last handler to the first (and which is why phase 2
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+ * and 3 are separate).
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+ *
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+ * 3. scan over 'hp_cpu_list' HP_PER_CPU times, the first time sets each
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+ * hp_cpu's 'iterator' to point to its first handler. With each loop,
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+ * initialise FQ objects and advance the iterator for the next loop.
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+ * Moreover, do this initialisation on the cpu it applies to so that Rx FQ
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+ * initialisation targets the correct cpu.
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+ */
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+
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+/*
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+ * helper to run something on all cpus (can't use on_each_cpu(), as that invokes
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+ * the fn from irq context, which is too restrictive).
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+ */
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+struct bstrap {
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+ int (*fn)(void);
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+ atomic_t started;
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+};
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+static int bstrap_fn(void *bs)
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+{
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+ struct bstrap *bstrap = bs;
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+ int err;
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+
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+ atomic_inc(&bstrap->started);
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+ err = bstrap->fn();
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+ if (err)
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+ return err;
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+ while (!kthread_should_stop())
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+ msleep(20);
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+ return 0;
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+}
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+static int on_all_cpus(int (*fn)(void))
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+{
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+ int cpu;
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+
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+ for_each_cpu(cpu, cpu_online_mask) {
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+ struct bstrap bstrap = {
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+ .fn = fn,
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+ .started = ATOMIC_INIT(0)
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+ };
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+ struct task_struct *k = kthread_create(bstrap_fn, &bstrap,
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+ "hotpotato%d", cpu);
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+ int ret;
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+
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+ if (IS_ERR(k))
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+ return -ENOMEM;
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+ kthread_bind(k, cpu);
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+ wake_up_process(k);
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+ /*
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+ * If we call kthread_stop() before the "wake up" has had an
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+ * effect, then the thread may exit with -EINTR without ever
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+ * running the function. So poll until it's started before
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+ * requesting it to stop.
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+ */
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+ while (!atomic_read(&bstrap.started))
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+ msleep(20);
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+ ret = kthread_stop(k);
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+ if (ret)
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+ return ret;
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+ }
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+ return 0;
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+}
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+
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+struct hp_handler {
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+
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+ /* The following data is stashed when 'rx' is dequeued; */
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+ /* -------------- */
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+ /* The Rx FQ, dequeues of which will stash the entire hp_handler */
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+ struct qman_fq rx;
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+ /* The Tx FQ we should forward to */
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+ struct qman_fq tx;
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+ /* The value we XOR post-dequeue, prior to validating */
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+ u32 rx_mixer;
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+ /* The value we XOR pre-enqueue, after validating */
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+ u32 tx_mixer;
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+ /* what the hotpotato address should be on dequeue */
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+ dma_addr_t addr;
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+ u32 *frame_ptr;
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+
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+ /* The following data isn't (necessarily) stashed on dequeue; */
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+ /* -------------- */
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+ u32 fqid_rx, fqid_tx;
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+ /* list node for linking us into 'hp_cpu' */
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+ struct list_head node;
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+ /* Just to check ... */
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+ unsigned int processor_id;
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+} ____cacheline_aligned;
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+
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+struct hp_cpu {
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+ /* identify the cpu we run on; */
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+ unsigned int processor_id;
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+ /* root node for the per-cpu list of handlers */
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+ struct list_head handlers;
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+ /* list node for linking us into 'hp_cpu_list' */
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+ struct list_head node;
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+ /*
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+ * when repeatedly scanning 'hp_list', each time linking the n'th
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+ * handlers together, this is used as per-cpu iterator state
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+ */
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+ struct hp_handler *iterator;
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+};
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+
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+/* Each cpu has one of these */
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+static DEFINE_PER_CPU(struct hp_cpu, hp_cpus);
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+
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+/* links together the hp_cpu structs, in first-come first-serve order. */
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+static LIST_HEAD(hp_cpu_list);
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+static spinlock_t hp_lock = __SPIN_LOCK_UNLOCKED(hp_lock);
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+
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+static unsigned int hp_cpu_list_length;
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+
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+/* the "special" handler, that starts and terminates the test. */
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+static struct hp_handler *special_handler;
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+static int loop_counter;
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+
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+/* handlers are allocated out of this, so they're properly aligned. */
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+static struct kmem_cache *hp_handler_slab;
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+
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+/* this is the frame data */
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+static void *__frame_ptr;
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+static u32 *frame_ptr;
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+static dma_addr_t frame_dma;
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+
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+/* the main function waits on this */
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+static DECLARE_WAIT_QUEUE_HEAD(queue);
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+
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+#define HP_PER_CPU 2
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+#define HP_LOOPS 8
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+/* 80 bytes, like a small ethernet frame, and bleeds into a second cacheline */
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+#define HP_NUM_WORDS 80
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+/* First word of the LFSR-based frame data */
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+#define HP_FIRST_WORD 0xabbaf00d
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+
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+static inline u32 do_lfsr(u32 prev)
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+{
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+ return (prev >> 1) ^ (-(prev & 1u) & 0xd0000001u);
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+}
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+
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+static int allocate_frame_data(void)
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+{
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+ u32 lfsr = HP_FIRST_WORD;
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+ int loop;
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+ struct platform_device *pdev = platform_device_alloc("foobar", -1);
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+
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+ if (!pdev) {
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+ pr_crit("platform_device_alloc() failed");
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+ return -EIO;
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+ }
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+ if (platform_device_add(pdev)) {
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+ pr_crit("platform_device_add() failed");
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+ return -EIO;
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+ }
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+ __frame_ptr = kmalloc(4 * HP_NUM_WORDS, GFP_KERNEL);
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+ if (!__frame_ptr)
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+ return -ENOMEM;
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+
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+ frame_ptr = PTR_ALIGN(__frame_ptr, 64);
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+ for (loop = 0; loop < HP_NUM_WORDS; loop++) {
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+ frame_ptr[loop] = lfsr;
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+ lfsr = do_lfsr(lfsr);
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+ }
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+ frame_dma = dma_map_single(&pdev->dev, frame_ptr, 4 * HP_NUM_WORDS,
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+ DMA_BIDIRECTIONAL);
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+ platform_device_del(pdev);
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+ platform_device_put(pdev);
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+ return 0;
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+}
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+
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+static void deallocate_frame_data(void)
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+{
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+ kfree(__frame_ptr);
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+}
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+
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+static inline int process_frame_data(struct hp_handler *handler,
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+ const struct qm_fd *fd)
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+{
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+ u32 *p = handler->frame_ptr;
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+ u32 lfsr = HP_FIRST_WORD;
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+ int loop;
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+
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+ if (qm_fd_addr_get64(fd) != handler->addr) {
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+ pr_crit("bad frame address");
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+ return -EIO;
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+ }
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+ for (loop = 0; loop < HP_NUM_WORDS; loop++, p++) {
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+ *p ^= handler->rx_mixer;
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+ if (*p != lfsr) {
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+ pr_crit("corrupt frame data");
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+ return -EIO;
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+ }
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+ *p ^= handler->tx_mixer;
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+ lfsr = do_lfsr(lfsr);
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+ }
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+ return 0;
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+}
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+
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+static enum qman_cb_dqrr_result normal_dqrr(struct qman_portal *portal,
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+ struct qman_fq *fq,
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+ const struct qm_dqrr_entry *dqrr)
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+{
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+ struct hp_handler *handler = (struct hp_handler *)fq;
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+
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+ if (process_frame_data(handler, &dqrr->fd)) {
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+ WARN_ON(1);
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+ goto skip;
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+ }
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+ if (qman_enqueue(&handler->tx, &dqrr->fd)) {
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+ pr_crit("qman_enqueue() failed");
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+ WARN_ON(1);
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+ }
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+skip:
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+ return qman_cb_dqrr_consume;
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+}
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+
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+static enum qman_cb_dqrr_result special_dqrr(struct qman_portal *portal,
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+ struct qman_fq *fq,
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+ const struct qm_dqrr_entry *dqrr)
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+{
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+ struct hp_handler *handler = (struct hp_handler *)fq;
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+
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+ process_frame_data(handler, &dqrr->fd);
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+ if (++loop_counter < HP_LOOPS) {
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+ if (qman_enqueue(&handler->tx, &dqrr->fd)) {
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+ pr_crit("qman_enqueue() failed");
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+ WARN_ON(1);
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+ goto skip;
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+ }
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+ } else {
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+ pr_info("Received final (%dth) frame\n", loop_counter);
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+ wake_up(&queue);
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+ }
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+skip:
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+ return qman_cb_dqrr_consume;
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+}
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+
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+static int create_per_cpu_handlers(void)
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+{
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+ struct hp_handler *handler;
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+ int loop;
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+ struct hp_cpu *hp_cpu = this_cpu_ptr(&hp_cpus);
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+
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+ hp_cpu->processor_id = smp_processor_id();
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+ spin_lock(&hp_lock);
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+ list_add_tail(&hp_cpu->node, &hp_cpu_list);
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+ hp_cpu_list_length++;
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+ spin_unlock(&hp_lock);
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+ INIT_LIST_HEAD(&hp_cpu->handlers);
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+ for (loop = 0; loop < HP_PER_CPU; loop++) {
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+ handler = kmem_cache_alloc(hp_handler_slab, GFP_KERNEL);
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+ if (!handler) {
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+ pr_crit("kmem_cache_alloc() failed");
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+ WARN_ON(1);
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+ return -EIO;
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+ }
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+ handler->processor_id = hp_cpu->processor_id;
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+ handler->addr = frame_dma;
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+ handler->frame_ptr = frame_ptr;
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+ list_add_tail(&handler->node, &hp_cpu->handlers);
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+ }
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+ return 0;
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+}
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+
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+static int destroy_per_cpu_handlers(void)
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+{
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+ struct list_head *loop, *tmp;
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+ struct hp_cpu *hp_cpu = this_cpu_ptr(&hp_cpus);
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+
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+ spin_lock(&hp_lock);
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+ list_del(&hp_cpu->node);
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+ spin_unlock(&hp_lock);
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+ list_for_each_safe(loop, tmp, &hp_cpu->handlers) {
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+ u32 flags = 0;
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+ struct hp_handler *handler = list_entry(loop, struct hp_handler,
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+ node);
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+ if (qman_retire_fq(&handler->rx, &flags) ||
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+ (flags & QMAN_FQ_STATE_BLOCKOOS)) {
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+ pr_crit("qman_retire_fq(rx) failed, flags: %x", flags);
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+ WARN_ON(1);
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+ return -EIO;
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+ }
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+ if (qman_oos_fq(&handler->rx)) {
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+ pr_crit("qman_oos_fq(rx) failed");
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+ WARN_ON(1);
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+ return -EIO;
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+ }
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+ qman_destroy_fq(&handler->rx);
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+ qman_destroy_fq(&handler->tx);
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+ qman_release_fqid(handler->fqid_rx);
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+ list_del(&handler->node);
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+ kmem_cache_free(hp_handler_slab, handler);
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+ }
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+ return 0;
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+}
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+
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+static inline u8 num_cachelines(u32 offset)
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+{
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+ u8 res = (offset + (L1_CACHE_BYTES - 1))
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+ / (L1_CACHE_BYTES);
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+ if (res > 3)
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+ return 3;
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+ return res;
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+}
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+#define STASH_DATA_CL \
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+ num_cachelines(HP_NUM_WORDS * 4)
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+#define STASH_CTX_CL \
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+ num_cachelines(offsetof(struct hp_handler, fqid_rx))
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+
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+static int init_handler(void *h)
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+{
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+ struct qm_mcc_initfq opts;
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+ struct hp_handler *handler = h;
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+ int err;
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+
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+ if (handler->processor_id != smp_processor_id()) {
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+ err = -EIO;
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+ goto failed;
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+ }
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+ /* Set up rx */
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+ memset(&handler->rx, 0, sizeof(handler->rx));
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+ if (handler == special_handler)
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|
|
+ handler->rx.cb.dqrr = special_dqrr;
|
|
|
+ else
|
|
|
+ handler->rx.cb.dqrr = normal_dqrr;
|
|
|
+ err = qman_create_fq(handler->fqid_rx, 0, &handler->rx);
|
|
|
+ if (err) {
|
|
|
+ pr_crit("qman_create_fq(rx) failed");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+ memset(&opts, 0, sizeof(opts));
|
|
|
+ opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
|
|
|
+ opts.fqd.fq_ctrl = QM_FQCTRL_CTXASTASHING;
|
|
|
+ qm_fqd_set_stashing(&opts.fqd, 0, STASH_DATA_CL, STASH_CTX_CL);
|
|
|
+ err = qman_init_fq(&handler->rx, QMAN_INITFQ_FLAG_SCHED |
|
|
|
+ QMAN_INITFQ_FLAG_LOCAL, &opts);
|
|
|
+ if (err) {
|
|
|
+ pr_crit("qman_init_fq(rx) failed");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+ /* Set up tx */
|
|
|
+ memset(&handler->tx, 0, sizeof(handler->tx));
|
|
|
+ err = qman_create_fq(handler->fqid_tx, QMAN_FQ_FLAG_NO_MODIFY,
|
|
|
+ &handler->tx);
|
|
|
+ if (err) {
|
|
|
+ pr_crit("qman_create_fq(tx) failed");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+failed:
|
|
|
+ return err;
|
|
|
+}
|
|
|
+
|
|
|
+static void init_handler_cb(void *h)
|
|
|
+{
|
|
|
+ if (init_handler(h))
|
|
|
+ WARN_ON(1);
|
|
|
+}
|
|
|
+
|
|
|
+static int init_phase2(void)
|
|
|
+{
|
|
|
+ int loop;
|
|
|
+ u32 fqid = 0;
|
|
|
+ u32 lfsr = 0xdeadbeef;
|
|
|
+ struct hp_cpu *hp_cpu;
|
|
|
+ struct hp_handler *handler;
|
|
|
+
|
|
|
+ for (loop = 0; loop < HP_PER_CPU; loop++) {
|
|
|
+ list_for_each_entry(hp_cpu, &hp_cpu_list, node) {
|
|
|
+ int err;
|
|
|
+
|
|
|
+ if (!loop)
|
|
|
+ hp_cpu->iterator = list_first_entry(
|
|
|
+ &hp_cpu->handlers,
|
|
|
+ struct hp_handler, node);
|
|
|
+ else
|
|
|
+ hp_cpu->iterator = list_entry(
|
|
|
+ hp_cpu->iterator->node.next,
|
|
|
+ struct hp_handler, node);
|
|
|
+ /* Rx FQID is the previous handler's Tx FQID */
|
|
|
+ hp_cpu->iterator->fqid_rx = fqid;
|
|
|
+ /* Allocate new FQID for Tx */
|
|
|
+ err = qman_alloc_fqid(&fqid);
|
|
|
+ if (err) {
|
|
|
+ pr_crit("qman_alloc_fqid() failed");
|
|
|
+ return err;
|
|
|
+ }
|
|
|
+ hp_cpu->iterator->fqid_tx = fqid;
|
|
|
+ /* Rx mixer is the previous handler's Tx mixer */
|
|
|
+ hp_cpu->iterator->rx_mixer = lfsr;
|
|
|
+ /* Get new mixer for Tx */
|
|
|
+ lfsr = do_lfsr(lfsr);
|
|
|
+ hp_cpu->iterator->tx_mixer = lfsr;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ /* Fix up the first handler (fqid_rx==0, rx_mixer=0xdeadbeef) */
|
|
|
+ hp_cpu = list_first_entry(&hp_cpu_list, struct hp_cpu, node);
|
|
|
+ handler = list_first_entry(&hp_cpu->handlers, struct hp_handler, node);
|
|
|
+ if (handler->fqid_rx != 0 || handler->rx_mixer != 0xdeadbeef)
|
|
|
+ return 1;
|
|
|
+ handler->fqid_rx = fqid;
|
|
|
+ handler->rx_mixer = lfsr;
|
|
|
+ /* and tag it as our "special" handler */
|
|
|
+ special_handler = handler;
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int init_phase3(void)
|
|
|
+{
|
|
|
+ int loop, err;
|
|
|
+ struct hp_cpu *hp_cpu;
|
|
|
+
|
|
|
+ for (loop = 0; loop < HP_PER_CPU; loop++) {
|
|
|
+ list_for_each_entry(hp_cpu, &hp_cpu_list, node) {
|
|
|
+ if (!loop)
|
|
|
+ hp_cpu->iterator = list_first_entry(
|
|
|
+ &hp_cpu->handlers,
|
|
|
+ struct hp_handler, node);
|
|
|
+ else
|
|
|
+ hp_cpu->iterator = list_entry(
|
|
|
+ hp_cpu->iterator->node.next,
|
|
|
+ struct hp_handler, node);
|
|
|
+ preempt_disable();
|
|
|
+ if (hp_cpu->processor_id == smp_processor_id()) {
|
|
|
+ err = init_handler(hp_cpu->iterator);
|
|
|
+ if (err)
|
|
|
+ return err;
|
|
|
+ } else {
|
|
|
+ smp_call_function_single(hp_cpu->processor_id,
|
|
|
+ init_handler_cb, hp_cpu->iterator, 1);
|
|
|
+ }
|
|
|
+ preempt_enable();
|
|
|
+ }
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int send_first_frame(void *ignore)
|
|
|
+{
|
|
|
+ u32 *p = special_handler->frame_ptr;
|
|
|
+ u32 lfsr = HP_FIRST_WORD;
|
|
|
+ int loop, err;
|
|
|
+ struct qm_fd fd;
|
|
|
+
|
|
|
+ if (special_handler->processor_id != smp_processor_id()) {
|
|
|
+ err = -EIO;
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+ memset(&fd, 0, sizeof(fd));
|
|
|
+ qm_fd_addr_set64(&fd, special_handler->addr);
|
|
|
+ qm_fd_set_contig_big(&fd, HP_NUM_WORDS * 4);
|
|
|
+ for (loop = 0; loop < HP_NUM_WORDS; loop++, p++) {
|
|
|
+ if (*p != lfsr) {
|
|
|
+ err = -EIO;
|
|
|
+ pr_crit("corrupt frame data");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+ *p ^= special_handler->tx_mixer;
|
|
|
+ lfsr = do_lfsr(lfsr);
|
|
|
+ }
|
|
|
+ pr_info("Sending first frame\n");
|
|
|
+ err = qman_enqueue(&special_handler->tx, &fd);
|
|
|
+ if (err) {
|
|
|
+ pr_crit("qman_enqueue() failed");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+failed:
|
|
|
+ return err;
|
|
|
+}
|
|
|
+
|
|
|
+static void send_first_frame_cb(void *ignore)
|
|
|
+{
|
|
|
+ if (send_first_frame(NULL))
|
|
|
+ WARN_ON(1);
|
|
|
+}
|
|
|
+
|
|
|
+int qman_test_stash(void)
|
|
|
+{
|
|
|
+ int err;
|
|
|
+
|
|
|
+ if (cpumask_weight(cpu_online_mask) < 2) {
|
|
|
+ pr_info("%s(): skip - only 1 CPU\n", __func__);
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ pr_info("%s(): Starting\n", __func__);
|
|
|
+
|
|
|
+ hp_cpu_list_length = 0;
|
|
|
+ loop_counter = 0;
|
|
|
+ hp_handler_slab = kmem_cache_create("hp_handler_slab",
|
|
|
+ sizeof(struct hp_handler), L1_CACHE_BYTES,
|
|
|
+ SLAB_HWCACHE_ALIGN, NULL);
|
|
|
+ if (!hp_handler_slab) {
|
|
|
+ err = -EIO;
|
|
|
+ pr_crit("kmem_cache_create() failed");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+
|
|
|
+ err = allocate_frame_data();
|
|
|
+ if (err)
|
|
|
+ goto failed;
|
|
|
+
|
|
|
+ /* Init phase 1 */
|
|
|
+ pr_info("Creating %d handlers per cpu...\n", HP_PER_CPU);
|
|
|
+ if (on_all_cpus(create_per_cpu_handlers)) {
|
|
|
+ err = -EIO;
|
|
|
+ pr_crit("on_each_cpu() failed");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+ pr_info("Number of cpus: %d, total of %d handlers\n",
|
|
|
+ hp_cpu_list_length, hp_cpu_list_length * HP_PER_CPU);
|
|
|
+
|
|
|
+ err = init_phase2();
|
|
|
+ if (err)
|
|
|
+ goto failed;
|
|
|
+
|
|
|
+ err = init_phase3();
|
|
|
+ if (err)
|
|
|
+ goto failed;
|
|
|
+
|
|
|
+ preempt_disable();
|
|
|
+ if (special_handler->processor_id == smp_processor_id()) {
|
|
|
+ err = send_first_frame(NULL);
|
|
|
+ if (err)
|
|
|
+ goto failed;
|
|
|
+ } else {
|
|
|
+ smp_call_function_single(special_handler->processor_id,
|
|
|
+ send_first_frame_cb, NULL, 1);
|
|
|
+ }
|
|
|
+ preempt_enable();
|
|
|
+
|
|
|
+ wait_event(queue, loop_counter == HP_LOOPS);
|
|
|
+ deallocate_frame_data();
|
|
|
+ if (on_all_cpus(destroy_per_cpu_handlers)) {
|
|
|
+ err = -EIO;
|
|
|
+ pr_crit("on_each_cpu() failed");
|
|
|
+ goto failed;
|
|
|
+ }
|
|
|
+ kmem_cache_destroy(hp_handler_slab);
|
|
|
+ pr_info("%s(): Finished\n", __func__);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+failed:
|
|
|
+ WARN_ON(1);
|
|
|
+ return err;
|
|
|
+}
|
Claudiu Manoil