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@@ -1942,52 +1942,44 @@ static int domain_context_mapping_one(struct dmar_domain *domain,
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return 0;
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}
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- context_clear_entry(context);
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-
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- id = domain->id;
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pgd = domain->pgd;
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- if (domain_type_is_vm_or_si(domain)) {
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- if (domain_type_is_vm(domain)) {
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- id = __iommu_attach_domain(domain, iommu);
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- if (id < 0) {
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- spin_unlock_irqrestore(&iommu->lock, flags);
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- pr_err("%s: No free domain ids\n", iommu->name);
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- return -EFAULT;
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- }
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- }
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-
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- /* Skip top levels of page tables for
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- * iommu which has less agaw than default.
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- * Unnecessary for PT mode.
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- */
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- if (translation != CONTEXT_TT_PASS_THROUGH) {
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- for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
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- pgd = phys_to_virt(dma_pte_addr(pgd));
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- if (!dma_pte_present(pgd)) {
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- spin_unlock_irqrestore(&iommu->lock, flags);
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- return -ENOMEM;
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- }
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- }
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- }
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+ id = __iommu_attach_domain(domain, iommu);
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+ if (id < 0) {
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+ spin_unlock_irqrestore(&iommu->lock, flags);
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+ pr_err("%s: No free domain ids\n", iommu->name);
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+ return -EFAULT;
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}
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+ context_clear_entry(context);
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context_set_domain_id(context, id);
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+ /*
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+ * Skip top levels of page tables for iommu which has less agaw
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+ * than default. Unnecessary for PT mode.
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+ */
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if (translation != CONTEXT_TT_PASS_THROUGH) {
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+ for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
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+ pgd = phys_to_virt(dma_pte_addr(pgd));
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+ if (!dma_pte_present(pgd)) {
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+ spin_unlock_irqrestore(&iommu->lock, flags);
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+ return -ENOMEM;
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+ }
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+ }
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+
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info = iommu_support_dev_iotlb(domain, iommu, bus, devfn);
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translation = info ? CONTEXT_TT_DEV_IOTLB :
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CONTEXT_TT_MULTI_LEVEL;
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- }
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- /*
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- * In pass through mode, AW must be programmed to indicate the largest
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- * AGAW value supported by hardware. And ASR is ignored by hardware.
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- */
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- if (unlikely(translation == CONTEXT_TT_PASS_THROUGH))
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- context_set_address_width(context, iommu->msagaw);
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- else {
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+
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context_set_address_root(context, virt_to_phys(pgd));
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context_set_address_width(context, iommu->agaw);
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+ } else {
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+ /*
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+ * In pass through mode, AW must be programmed to
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+ * indicate the largest AGAW value supported by
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+ * hardware. And ASR is ignored by hardware.
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+ */
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+ context_set_address_width(context, iommu->msagaw);
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}
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context_set_translation_type(context, translation);
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