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@@ -499,16 +499,14 @@ static int mce_usable_address(struct mce *m)
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return 1;
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}
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-static bool memory_error(struct mce *m)
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+bool mce_is_memory_error(struct mce *m)
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{
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- struct cpuinfo_x86 *c = &boot_cpu_data;
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-
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- if (c->x86_vendor == X86_VENDOR_AMD) {
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+ if (m->cpuvendor == X86_VENDOR_AMD) {
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/* ErrCodeExt[20:16] */
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u8 xec = (m->status >> 16) & 0x1f;
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return (xec == 0x0 || xec == 0x8);
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- } else if (c->x86_vendor == X86_VENDOR_INTEL) {
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+ } else if (m->cpuvendor == X86_VENDOR_INTEL) {
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/*
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* Intel SDM Volume 3B - 15.9.2 Compound Error Codes
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*
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@@ -529,6 +527,7 @@ static bool memory_error(struct mce *m)
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return false;
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}
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+EXPORT_SYMBOL_GPL(mce_is_memory_error);
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static bool cec_add_mce(struct mce *m)
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{
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@@ -536,7 +535,7 @@ static bool cec_add_mce(struct mce *m)
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return false;
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/* We eat only correctable DRAM errors with usable addresses. */
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- if (memory_error(m) &&
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+ if (mce_is_memory_error(m) &&
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!(m->status & MCI_STATUS_UC) &&
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mce_usable_address(m))
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if (!cec_add_elem(m->addr >> PAGE_SHIFT))
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@@ -713,7 +712,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
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severity = mce_severity(&m, mca_cfg.tolerant, NULL, false);
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- if (severity == MCE_DEFERRED_SEVERITY && memory_error(&m))
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+ if (severity == MCE_DEFERRED_SEVERITY && mce_is_memory_error(&m))
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if (m.status & MCI_STATUS_ADDRV)
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m.severity = severity;
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