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+OMAP SSI controller bindings
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+
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+OMAP Synchronous Serial Interface (SSI) controller implements a legacy
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+variant of MIPI's High Speed Synchronous Serial Interface (HSI).
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+
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+Required properties:
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+- compatible: Should include "ti,omap3-ssi".
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+- reg-names: Contains the values "sys" and "gdd" (in this order).
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+- reg: Contains a matching register specifier for each entry
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+ in reg-names.
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+- interrupt-names: Contains the value "gdd_mpu".
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+- interrupts: Contains matching interrupt information for each entry
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+ in interrupt-names.
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+- ranges: Represents the bus address mapping between the main
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+ controller node and the child nodes below.
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+- clock-names: Must include the following entries:
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+ "ssi_ssr_fck": The OMAP clock of that name
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+ "ssi_sst_fck": The OMAP clock of that name
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+ "ssi_ick": The OMAP clock of that name
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+- clocks: Contains a matching clock specifier for each entry in
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+ clock-names.
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+- #address-cells: Should be set to <1>
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+- #size-cells: Should be set to <1>
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+
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+Each port is represented as a sub-node of the ti,omap3-ssi device.
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+
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+Required Port sub-node properties:
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+- compatible: Should be set to the following value
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+ ti,omap3-ssi-port (applicable to OMAP34xx devices)
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+- reg-names: Contains the values "tx" and "rx" (in this order).
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+- reg: Contains a matching register specifier for each entry
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+ in reg-names.
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+- interrupt-parent Should be a phandle for the interrupt controller
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+- interrupts: Should contain interrupt specifiers for mpu interrupts
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+ 0 and 1 (in this order).
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+- ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE
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+ events for the port. This is an optional board-specific
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+ property. If it's missing the port will not be
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+ enabled.
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+
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+Example for Nokia N900:
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+
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+ssi-controller@48058000 {
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+ compatible = "ti,omap3-ssi";
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+
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+ /* needed until hwmod is updated to use the compatible string */
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+ ti,hwmods = "ssi";
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+
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+ reg = <0x48058000 0x1000>,
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+ <0x48059000 0x1000>;
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+ reg-names = "sys",
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+ "gdd";
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+
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+ interrupts = <55>;
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+ interrupt-names = "gdd_mpu";
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+
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+ clocks = <&ssi_ssr_fck>,
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+ <&ssi_sst_fck>,
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+ <&ssi_ick>;
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+ clock-names = "ssi_ssr_fck",
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+ "ssi_sst_fck",
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+ "ssi_ick";
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ ssi-port@4805a000 {
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+ compatible = "ti,omap3-ssi-port";
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+
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+ reg = <0x4805a000 0x800>,
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+ <0x4805a800 0x800>;
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+ reg-names = "tx",
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+ "rx";
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <67>,
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+ <68>;
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+
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+ ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
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+ }
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+
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+ ssi-port@4805a000 {
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+ compatible = "ti,omap3-ssi-port";
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+
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+ reg = <0x4805b000 0x800>,
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+ <0x4805b800 0x800>;
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+ reg-names = "tx",
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+ "rx";
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <69>,
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+ <70>;
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+
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+ status = "disabled"; /* second port is not used on N900 */
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+ }
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+}
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