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@@ -67,6 +67,7 @@ static unsigned int fmax = 515633;
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* @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
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* register
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* @pwrreg_powerup: power up value for MMCIPOWER register
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+ * @f_max: maximum clk frequency supported by the controller.
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* @signal_direction: input/out direction of bus signals can be indicated
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* @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
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* @busy_detect: true if busy detection on dat0 is supported
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@@ -87,6 +88,7 @@ struct variant_data {
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bool blksz_datactrl16;
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bool blksz_datactrl4;
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u32 pwrreg_powerup;
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+ u32 f_max;
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bool signal_direction;
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bool pwrreg_clkgate;
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bool busy_detect;
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@@ -98,6 +100,7 @@ static struct variant_data variant_arm = {
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.fifohalfsize = 8 * 4,
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.datalength_bits = 16,
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.pwrreg_powerup = MCI_PWR_UP,
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+ .f_max = 100000000,
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};
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static struct variant_data variant_arm_extended_fifo = {
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@@ -105,6 +108,7 @@ static struct variant_data variant_arm_extended_fifo = {
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.fifohalfsize = 64 * 4,
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.datalength_bits = 16,
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.pwrreg_powerup = MCI_PWR_UP,
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+ .f_max = 100000000,
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};
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static struct variant_data variant_arm_extended_fifo_hwfc = {
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@@ -113,6 +117,7 @@ static struct variant_data variant_arm_extended_fifo_hwfc = {
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.clkreg_enable = MCI_ARM_HWFCEN,
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.datalength_bits = 16,
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.pwrreg_powerup = MCI_PWR_UP,
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+ .f_max = 100000000,
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};
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static struct variant_data variant_u300 = {
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@@ -123,6 +128,7 @@ static struct variant_data variant_u300 = {
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.datalength_bits = 16,
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.sdio = true,
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.pwrreg_powerup = MCI_PWR_ON,
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+ .f_max = 100000000,
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.signal_direction = true,
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.pwrreg_clkgate = true,
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.pwrreg_nopower = true,
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@@ -136,6 +142,7 @@ static struct variant_data variant_nomadik = {
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.sdio = true,
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.st_clkdiv = true,
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.pwrreg_powerup = MCI_PWR_ON,
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+ .f_max = 100000000,
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.signal_direction = true,
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.pwrreg_clkgate = true,
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.pwrreg_nopower = true,
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@@ -152,6 +159,7 @@ static struct variant_data variant_ux500 = {
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.sdio = true,
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.st_clkdiv = true,
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.pwrreg_powerup = MCI_PWR_ON,
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+ .f_max = 100000000,
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.signal_direction = true,
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.pwrreg_clkgate = true,
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.busy_detect = true,
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@@ -171,6 +179,7 @@ static struct variant_data variant_ux500v2 = {
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.st_clkdiv = true,
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.blksz_datactrl16 = true,
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.pwrreg_powerup = MCI_PWR_ON,
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+ .f_max = 100000000,
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.signal_direction = true,
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.pwrreg_clkgate = true,
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.busy_detect = true,
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@@ -1473,8 +1482,8 @@ static int mmci_probe(struct amba_device *dev,
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* so we try to adjust the clock down to this,
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* (if possible).
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*/
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- if (host->mclk > 100000000) {
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- ret = clk_set_rate(host->clk, 100000000);
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+ if (host->mclk > variant->f_max) {
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+ ret = clk_set_rate(host->clk, variant->f_max);
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if (ret < 0)
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goto clk_disable;
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host->mclk = clk_get_rate(host->clk);
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