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@@ -981,8 +981,14 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
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I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
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POSTING_READ(mmio);
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- /* Flush the TLB for this page */
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- if (INTEL_INFO(dev)->gen >= 6) {
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+ /*
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+ * Flush the TLB for this page
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+ *
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+ * FIXME: These two bits have disappeared on gen8, so a question
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+ * arises: do we still need this and if so how should we go about
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+ * invalidating the TLB?
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+ */
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+ if (INTEL_INFO(dev)->gen >= 6 && INTEL_INFO(dev)->gen < 8) {
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u32 reg = RING_INSTPM(ring->mmio_base);
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/* ring should be idle before issuing a sync flush*/
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