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@@ -274,10 +274,14 @@
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#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
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#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
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#define DSISR_NOHPTE 0x40000000 /* no translation found */
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#define DSISR_NOHPTE 0x40000000 /* no translation found */
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#define DSISR_PROTFAULT 0x08000000 /* protection fault */
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#define DSISR_PROTFAULT 0x08000000 /* protection fault */
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+#define DSISR_BADACCESS 0x04000000 /* bad access to CI or G */
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#define DSISR_ISSTORE 0x02000000 /* access was a store */
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#define DSISR_ISSTORE 0x02000000 /* access was a store */
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#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
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#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
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#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */
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#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */
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#define DSISR_KEYFAULT 0x00200000 /* Key fault */
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#define DSISR_KEYFAULT 0x00200000 /* Key fault */
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+#define DSISR_UNSUPP_MMU 0x00080000 /* Unsupported MMU config */
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+#define DSISR_SET_RC 0x00040000 /* Failed setting of R/C bits */
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+#define DSISR_PGDIRFAULT 0x00020000 /* Fault on page directory */
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#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */
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#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */
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#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */
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#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */
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#define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */
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#define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */
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