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ARM: dts: exynos: Add sysreg phandle to ADC node

Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.

This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
To: linux-samsung-soc@vger.kernel.org
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Naveen Krishna Chatradhi 11 years ago
parent
commit
db9bf4d657

+ 2 - 1
arch/arm/boot/dts/exynos3250.dtsi

@@ -272,12 +272,13 @@
 		adc: adc@126C0000 {
 		adc: adc@126C0000 {
 			compatible = "samsung,exynos3250-adc",
 			compatible = "samsung,exynos3250-adc",
 				     "samsung,exynos-adc-v2";
 				     "samsung,exynos-adc-v2";
-			reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+			reg = <0x126C0000 0x100>;
 			interrupts = <0 137 0>;
 			interrupts = <0 137 0>;
 			clock-names = "adc", "sclk";
 			clock-names = "adc", "sclk";
 			clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
 			clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
 			#io-channel-cells = <1>;
 			#io-channel-cells = <1>;
 			io-channel-ranges;
 			io-channel-ranges;
+			samsung,syscon-phandle = <&pmu_system_controller>;
 			status = "disabled";
 			status = "disabled";
 		};
 		};
 
 

+ 2 - 1
arch/arm/boot/dts/exynos4x12.dtsi

@@ -108,13 +108,14 @@
 
 
 	adc: adc@126C0000 {
 	adc: adc@126C0000 {
 		compatible = "samsung,exynos-adc-v1";
 		compatible = "samsung,exynos-adc-v1";
-		reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+		reg = <0x126C0000 0x100>;
 		interrupt-parent = <&combiner>;
 		interrupt-parent = <&combiner>;
 		interrupts = <10 3>;
 		interrupts = <10 3>;
 		clocks = <&clock CLK_TSADC>;
 		clocks = <&clock CLK_TSADC>;
 		clock-names = "adc";
 		clock-names = "adc";
 		#io-channel-cells = <1>;
 		#io-channel-cells = <1>;
 		io-channel-ranges;
 		io-channel-ranges;
+		samsung,syscon-phandle = <&pmu_system_controller>;
 		status = "disabled";
 		status = "disabled";
 	};
 	};
 
 

+ 2 - 1
arch/arm/boot/dts/exynos5250.dtsi

@@ -765,12 +765,13 @@
 
 
 	adc: adc@12D10000 {
 	adc: adc@12D10000 {
 		compatible = "samsung,exynos-adc-v1";
 		compatible = "samsung,exynos-adc-v1";
-		reg = <0x12D10000 0x100>, <0x10040718 0x4>;
+		reg = <0x12D10000 0x100>;
 		interrupts = <0 106 0>;
 		interrupts = <0 106 0>;
 		clocks = <&clock CLK_ADC>;
 		clocks = <&clock CLK_ADC>;
 		clock-names = "adc";
 		clock-names = "adc";
 		#io-channel-cells = <1>;
 		#io-channel-cells = <1>;
 		io-channel-ranges;
 		io-channel-ranges;
+		samsung,syscon-phandle = <&pmu_system_controller>;
 		status = "disabled";
 		status = "disabled";
 	};
 	};
 
 

+ 2 - 1
arch/arm/boot/dts/exynos5420.dtsi

@@ -541,12 +541,13 @@
 
 
 	adc: adc@12D10000 {
 	adc: adc@12D10000 {
 		compatible = "samsung,exynos-adc-v2";
 		compatible = "samsung,exynos-adc-v2";
-		reg = <0x12D10000 0x100>, <0x10040720 0x4>;
+		reg = <0x12D10000 0x100>;
 		interrupts = <0 106 0>;
 		interrupts = <0 106 0>;
 		clocks = <&clock CLK_TSADC>;
 		clocks = <&clock CLK_TSADC>;
 		clock-names = "adc";
 		clock-names = "adc";
 		#io-channel-cells = <1>;
 		#io-channel-cells = <1>;
 		io-channel-ranges;
 		io-channel-ranges;
+		samsung,syscon-phandle = <&pmu_system_controller>;
 		status = "disabled";
 		status = "disabled";
 	};
 	};