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@@ -960,6 +960,12 @@ static void ci_apply_state_adjust_rules(struct amdgpu_device *adev,
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sclk = ps->performance_levels[0].sclk;
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}
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+ if (adev->pm.pm_display_cfg.min_core_set_clock > sclk)
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+ sclk = adev->pm.pm_display_cfg.min_core_set_clock;
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+
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+ if (adev->pm.pm_display_cfg.min_mem_set_clock > mclk)
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+ mclk = adev->pm.pm_display_cfg.min_mem_set_clock;
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+
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if (rps->vce_active) {
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if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk)
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sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk;
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