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@@ -37,7 +37,7 @@
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#define CREG_CPU_ARC770_IRQ_MUX (AXC001_CREG + 0x114)
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#define CREG_CPU_GPIO_UART_MUX (AXC001_CREG + 0x120)
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-static void enable_gpio_intc_wire(void)
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+static void __init axs10x_enable_gpio_intc_wire(void)
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{
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/*
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* Peripherals on CPU Card and Mother Board are wired to cpu intc via
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@@ -83,7 +83,7 @@ static void enable_gpio_intc_wire(void)
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iowrite32(1 << MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN);
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}
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-static void axs10x_print_board_ver(unsigned int creg, const char *str)
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+static void __init axs10x_print_board_ver(unsigned int creg, const char *str)
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{
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union ver {
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struct {
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@@ -101,7 +101,7 @@ static void axs10x_print_board_ver(unsigned int creg, const char *str)
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board.y);
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}
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-static void axs10x_early_init(void)
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+static void __init axs10x_early_init(void)
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{
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int mb_rev;
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char mb[32];
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@@ -112,7 +112,7 @@ static void axs10x_early_init(void)
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else
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mb_rev = 2; /* HT-2 (rev2.0) */
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- enable_gpio_intc_wire();
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+ axs10x_enable_gpio_intc_wire();
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scnprintf(mb, 32, "MainBoard v%d", mb_rev);
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axs10x_print_board_ver(CREG_MB_VER, mb);
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@@ -227,7 +227,7 @@ static const struct aperture axs_mb_memmap[16] = {
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{AXS_MB_SLV_AXI_TUNNEL_CPU, 0xF},
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};
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-static noinline void
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+static noinline void __init
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axs101_set_memmap(void __iomem *base, const struct aperture map[16])
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{
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unsigned int slave_select, slave_offset;
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@@ -252,7 +252,7 @@ axs101_set_memmap(void __iomem *base, const struct aperture map[16])
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iowrite32(slave_offset, base + 0xC); /* OFFSET1 */
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}
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-static void axs101_early_init(void)
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+static void __init axs101_early_init(void)
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{
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int i;
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