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@@ -134,7 +134,7 @@ int write_ulpi(u8 addr, u8 data)
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/* Operations that will be called from OTG Finite State Machine */
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/* Charge vbus for vbus pulsing in SRP */
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-void fsl_otg_chrg_vbus(int on)
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+void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
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{
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u32 tmp;
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@@ -170,7 +170,7 @@ void fsl_otg_dischrg_vbus(int on)
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}
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/* A-device driver vbus, controlled through PP bit in PORTSC */
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-void fsl_otg_drv_vbus(int on)
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+void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
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{
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u32 tmp;
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@@ -188,7 +188,7 @@ void fsl_otg_drv_vbus(int on)
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* Pull-up D+, signalling connect by periperal. Also used in
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* data-line pulsing in SRP
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*/
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-void fsl_otg_loc_conn(int on)
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+void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
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{
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u32 tmp;
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@@ -207,7 +207,7 @@ void fsl_otg_loc_conn(int on)
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* port. In host mode, controller will automatically send SOF.
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* Suspend will block the data on the port.
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*/
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-void fsl_otg_loc_sof(int on)
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+void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
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{
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u32 tmp;
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@@ -222,7 +222,7 @@ void fsl_otg_loc_sof(int on)
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}
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/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
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-void fsl_otg_start_pulse(void)
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+void fsl_otg_start_pulse(struct otg_fsm *fsm)
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{
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u32 tmp;
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@@ -235,7 +235,7 @@ void fsl_otg_start_pulse(void)
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fsl_otg_loc_conn(1);
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#endif
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- fsl_otg_add_timer(b_data_pulse_tmr);
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+ fsl_otg_add_timer(fsm, b_data_pulse_tmr);
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}
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void b_data_pulse_end(unsigned long foo)
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@@ -252,14 +252,14 @@ void b_data_pulse_end(unsigned long foo)
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void fsl_otg_pulse_vbus(void)
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{
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srp_wait_done = 0;
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- fsl_otg_chrg_vbus(1);
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+ fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
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/* start the timer to end vbus charge */
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- fsl_otg_add_timer(b_vbus_pulse_tmr);
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+ fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
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}
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void b_vbus_pulse_end(unsigned long foo)
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{
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- fsl_otg_chrg_vbus(0);
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+ fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
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/*
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* As USB3300 using the same a_sess_vld and b_sess_vld voltage
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@@ -267,7 +267,7 @@ void b_vbus_pulse_end(unsigned long foo)
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* residual voltage of vbus pulsing and A device pull up
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*/
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fsl_otg_dischrg_vbus(1);
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- fsl_otg_add_timer(b_srp_wait_tmr);
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+ fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
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}
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void b_srp_end(unsigned long foo)
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@@ -289,7 +289,7 @@ void a_wait_enum(unsigned long foo)
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{
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VDBG("a_wait_enum timeout\n");
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if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
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- fsl_otg_add_timer(a_wait_enum_tmr);
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+ fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
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else
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otg_statemachine(&fsl_otg_dev->fsm);
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}
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@@ -376,7 +376,7 @@ void fsl_otg_uninit_timers(void)
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}
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/* Add timer to timer list */
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-void fsl_otg_add_timer(void *gtimer)
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+void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
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{
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struct fsl_otg_timer *timer = gtimer;
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struct fsl_otg_timer *tmp_timer;
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@@ -395,7 +395,7 @@ void fsl_otg_add_timer(void *gtimer)
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}
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/* Remove timer from the timer list; clear timeout status */
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-void fsl_otg_del_timer(void *gtimer)
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+void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
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{
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struct fsl_otg_timer *timer = gtimer;
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struct fsl_otg_timer *tmp_timer, *del_tmp;
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@@ -468,7 +468,7 @@ int fsl_otg_start_host(struct otg_fsm *fsm, int on)
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retval = dev->driver->pm->resume(dev);
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if (fsm->id) {
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/* default-b */
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- fsl_otg_drv_vbus(1);
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+ fsl_otg_drv_vbus(fsm, 1);
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/*
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* Workaround: b_host can't driver
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* vbus, but PP in PORTSC needs to
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@@ -493,7 +493,7 @@ int fsl_otg_start_host(struct otg_fsm *fsm, int on)
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retval = dev->driver->pm->suspend(dev);
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if (fsm->id)
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/* default-b */
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- fsl_otg_drv_vbus(0);
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+ fsl_otg_drv_vbus(fsm, 0);
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}
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otg_dev->host_working = 0;
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}
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