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@@ -1,7 +1,8 @@
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/*
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* Device Tree Source for the Lager board
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*
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- * Copyright (C) 2013 Renesas Solutions Corp.
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+ * Copyright (C) 2013-2014 Renesas Solutions Corp.
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+ * Copyright (C) 2014 Cogent Embedded, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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@@ -124,6 +125,16 @@
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renesas,function = "scif0";
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};
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+ ether_pins: ether {
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+ renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
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+ renesas,function = "eth";
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+ };
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+
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+ phy1_pins: phy1 {
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+ renesas,groups = "intc_irq0";
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+ renesas,function = "intc";
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+ };
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+
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scif1_pins: serial1 {
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renesas,groups = "scif1_data";
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renesas,function = "scif1";
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@@ -150,6 +161,21 @@
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};
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};
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+ðer {
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+ pinctrl-0 = <ðer_pins &phy1_pins>;
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+ pinctrl-names = "default";
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+
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+ phy-handle = <&phy1>;
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+ renesas,ether-link-active-low;
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+ status = "ok";
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+
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+ phy1: ethernet-phy@1 {
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+ reg = <1>;
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+ interrupt-parent = <&irqc0>;
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+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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+ };
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+};
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+
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&mmcif1 {
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pinctrl-0 = <&mmc1_pins>;
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pinctrl-names = "default";
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