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@@ -76,7 +76,7 @@
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#define RTL_SLOT_TIME_20 20
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/*related with tcp/ip. */
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-/*if_ehther.h*/
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+/*if_ether.h*/
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#define ETH_P_PAE 0x888E /*Port Access Entity
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*(IEEE 802.1X) */
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#define ETH_P_IP 0x0800 /*Internet Protocol packet */
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@@ -112,7 +112,7 @@
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#define MAX_NUM_RATES 264
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/*for 88E use*/
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-/*It must always set to 4, otherwise read efuse table secquence will be wrong.*/
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+/*It must always set to 4, otherwise read efuse table sequence will be wrong.*/
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#define MAX_TX_COUNT 4
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#define MAX_RF_PATH 4
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#define MAX_CHNL_GROUP_24G 6
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@@ -435,7 +435,7 @@ enum ht_channel_width {
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HT_CHANNEL_WIDTH_80 = 2,
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};
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-/* Ref: 802.11i sepc D10.0 7.3.2.25.1
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+/* Ref: 802.11i spec D10.0 7.3.2.25.1
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Cipher Suites Encryption Algorithms */
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enum rt_enc_alg {
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NO_ENCRYPTION = 0,
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@@ -499,14 +499,14 @@ enum rtl_var_map {
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RTL_IMR_BCNDMAINT3, /*Beacon DMA Interrupt 3 */
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RTL_IMR_BCNDMAINT2, /*Beacon DMA Interrupt 2 */
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RTL_IMR_BCNDMAINT1, /*Beacon DMA Interrupt 1 */
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- RTL_IMR_BCNDOK8, /*Beacon Queue DMA OK Interrup 8 */
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- RTL_IMR_BCNDOK7, /*Beacon Queue DMA OK Interrup 7 */
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- RTL_IMR_BCNDOK6, /*Beacon Queue DMA OK Interrup 6 */
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- RTL_IMR_BCNDOK5, /*Beacon Queue DMA OK Interrup 5 */
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- RTL_IMR_BCNDOK4, /*Beacon Queue DMA OK Interrup 4 */
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- RTL_IMR_BCNDOK3, /*Beacon Queue DMA OK Interrup 3 */
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- RTL_IMR_BCNDOK2, /*Beacon Queue DMA OK Interrup 2 */
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- RTL_IMR_BCNDOK1, /*Beacon Queue DMA OK Interrup 1 */
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+ RTL_IMR_BCNDOK8, /*Beacon Queue DMA OK Interrupt 8 */
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+ RTL_IMR_BCNDOK7, /*Beacon Queue DMA OK Interrupt 7 */
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+ RTL_IMR_BCNDOK6, /*Beacon Queue DMA OK Interrupt 6 */
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+ RTL_IMR_BCNDOK5, /*Beacon Queue DMA OK Interrupt 5 */
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+ RTL_IMR_BCNDOK4, /*Beacon Queue DMA OK Interrupt 4 */
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+ RTL_IMR_BCNDOK3, /*Beacon Queue DMA OK Interrupt 3 */
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+ RTL_IMR_BCNDOK2, /*Beacon Queue DMA OK Interrupt 2 */
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+ RTL_IMR_BCNDOK1, /*Beacon Queue DMA OK Interrupt 1 */
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RTL_IMR_TIMEOUT2, /*Timeout interrupt 2 */
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RTL_IMR_TIMEOUT1, /*Timeout interrupt 1 */
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RTL_IMR_TXFOVW, /*Transmit FIFO Overflow */
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@@ -515,10 +515,10 @@ enum rtl_var_map {
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RTL_IMR_RXFOVW, /*Receive FIFO Overflow */
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RTL_IMR_RDU, /*Receive Descriptor Unavailable */
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RTL_IMR_ATIMEND, /*For 92C,ATIM Window End Interrupt */
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- RTL_IMR_BDOK, /*Beacon Queue DMA OK Interrup */
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+ RTL_IMR_BDOK, /*Beacon Queue DMA OK Interrupt */
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RTL_IMR_HIGHDOK, /*High Queue DMA OK Interrupt */
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RTL_IMR_COMDOK, /*Command Queue DMA OK Interrupt*/
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- RTL_IMR_TBDOK, /*Transmit Beacon OK interrup */
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+ RTL_IMR_TBDOK, /*Transmit Beacon OK interrupt */
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RTL_IMR_MGNTDOK, /*Management Queue DMA OK Interrupt */
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RTL_IMR_TBDER, /*For 92C,Transmit Beacon Error Interrupt */
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RTL_IMR_BKDOK, /*AC_BK DMA OK Interrupt */
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@@ -1256,7 +1256,7 @@ struct rtl_security {
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bool use_defaultkey;
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/*Encryption Algorithm for Unicast Packet */
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enum rt_enc_alg pairwise_enc_algorithm;
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- /*Encryption Algorithm for Brocast/Multicast */
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+ /*Encryption Algorithm for Broadcast/Multicast */
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enum rt_enc_alg group_enc_algorithm;
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/*Cam Entry Bitmap */
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u32 hwsec_cam_bitmap;
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@@ -1691,7 +1691,7 @@ struct rtl_stats {
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};
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struct rt_link_detect {
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- /* count for raoming */
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+ /* count for roaming */
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u32 bcn_rx_inperiod;
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u32 roam_times;
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@@ -2089,7 +2089,7 @@ struct rtl_priv {
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/*
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*hal_cfg : for diff cards
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- *intf_ops : for diff interrface usb/pcie
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+ *intf_ops : for diff interface usb/pcie
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*/
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struct rtl_hal_cfg *cfg;
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struct rtl_intf_ops *intf_ops;
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@@ -2107,7 +2107,7 @@ struct rtl_priv {
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/*for bt coexist use*/
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struct rtl_bt_coexist btcoexist;
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- /* seperate 92ee from other ICs,
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+ /* separate 92ee from other ICs,
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* 92ee use new trx flow. */
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bool use_new_trx_flow;
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/*This must be the last item so
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@@ -2385,7 +2385,7 @@ Set subfield of little-endian 4-byte value to specified value. */
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#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6)
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/* no matter RFOFF or SLEEP we set PS_ASPM_LEVL*/
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#define RT_PS_LEVEL_ASPM BIT(7)
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-/*When LPS is on, disable 2R if no packet is received or transmittd.*/
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+/*When LPS is on, disable 2R if no packet is received or transmitted.*/
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#define RT_RF_LPS_DISALBE_2R BIT(30)
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#define RT_RF_LPS_LEVEL_ASPM BIT(31) /*LPS with ASPM */
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#define RT_IN_PS_LEVEL(ppsc, _ps_flg) \
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Masanari Iida