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@@ -818,6 +818,7 @@ static inline void qib_write_ureg(const struct qib_devdata *dd,
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enum qib_ureg regno, u64 value, int ctxt)
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{
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u64 __iomem *ubase;
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+
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if (dd->userbase)
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ubase = (u64 __iomem *)
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((char __iomem *) dd->userbase +
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@@ -2032,6 +2033,7 @@ static void qib_7322_set_intr_state(struct qib_devdata *dd, u32 enable)
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if (dd->cspec->num_msix_entries) {
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/* and same for MSIx */
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u64 val = qib_read_kreg64(dd, kr_intgranted);
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+
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if (val)
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qib_write_kreg(dd, kr_intgranted, val);
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}
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@@ -2177,6 +2179,7 @@ static void qib_7322_handle_hwerrors(struct qib_devdata *dd, char *msg,
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int err;
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unsigned long flags;
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struct qib_pportdata *ppd = dd->pport;
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+
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for (; pidx < dd->num_pports; ++pidx, ppd++) {
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err = 0;
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if (pidx == 0 && (hwerrs &
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@@ -2802,9 +2805,11 @@ static void qib_irq_notifier_notify(struct irq_affinity_notify *notify,
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if (n->rcv) {
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struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg;
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+
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qib_update_rhdrq_dca(rcd, cpu);
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} else {
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struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg;
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+
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qib_update_sdma_dca(ppd, cpu);
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}
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}
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@@ -2817,9 +2822,11 @@ static void qib_irq_notifier_release(struct kref *ref)
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if (n->rcv) {
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struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg;
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+
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dd = rcd->dd;
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} else {
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struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg;
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+
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dd = ppd->dd;
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}
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qib_devinfo(dd->pcidev,
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@@ -2995,6 +3002,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd)
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struct qib_pportdata *ppd;
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struct qib_qsfp_data *qd;
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u32 mask;
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+
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if (!dd->pport[pidx].link_speed_supported)
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continue;
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mask = QSFP_GPIO_MOD_PRS_N;
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@@ -3002,6 +3010,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd)
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mask <<= (QSFP_GPIO_PORT2_SHIFT * ppd->hw_pidx);
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if (gpiostatus & dd->cspec->gpio_mask & mask) {
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u64 pins;
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+
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qd = &ppd->cpspec->qsfp_data;
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gpiostatus &= ~mask;
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pins = qib_read_kreg64(dd, kr_extstatus);
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@@ -3699,6 +3708,7 @@ static int qib_do_7322_reset(struct qib_devdata *dd)
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*/
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for (i = 0; i < msix_entries; i++) {
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u64 vecaddr, vecdata;
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+
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vecaddr = qib_read_kreg64(dd, 2 * i +
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(QIB_7322_MsixTable_OFFS / sizeof(u64)));
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vecdata = qib_read_kreg64(dd, 1 + 2 * i +
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@@ -5360,6 +5370,7 @@ static void qib_autoneg_7322_send(struct qib_pportdata *ppd, int which)
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static void set_7322_ibspeed_fast(struct qib_pportdata *ppd, u32 speed)
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{
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u64 newctrlb;
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+
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newctrlb = ppd->cpspec->ibcctrl_b & ~(IBA7322_IBC_SPEED_MASK |
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IBA7322_IBC_IBTA_1_2_MASK |
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IBA7322_IBC_MAX_SPEED_MASK);
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@@ -5846,6 +5857,7 @@ static void get_7322_chip_params(struct qib_devdata *dd)
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static void qib_7322_set_baseaddrs(struct qib_devdata *dd)
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{
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u32 cregbase;
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+
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cregbase = qib_read_kreg32(dd, kr_counterregbase);
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dd->cspec->cregbase = (u64 __iomem *)(cregbase +
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@@ -6186,6 +6198,7 @@ static int setup_txselect(const char *str, struct kernel_param *kp)
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struct qib_devdata *dd;
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unsigned long val;
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char *n;
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+
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if (strlen(str) >= MAX_ATTEN_LEN) {
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pr_info("txselect_values string too long\n");
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return -ENOSPC;
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@@ -6396,6 +6409,7 @@ static void write_7322_initregs(struct qib_devdata *dd)
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val = TIDFLOW_ERRBITS; /* these are W1C */
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for (i = 0; i < dd->cfgctxts; i++) {
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int flow;
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+
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for (flow = 0; flow < NUM_TIDFLOWS_CTXT; flow++)
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qib_write_ureg(dd, ur_rcvflowtable+flow, val, i);
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}
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@@ -6506,6 +6520,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
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for (pidx = 0; pidx < NUM_IB_PORTS; ++pidx) {
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struct qib_chippport_specific *cp = ppd->cpspec;
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+
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ppd->link_speed_supported = features & PORT_SPD_CAP;
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features >>= PORT_SPD_CAP_SHIFT;
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if (!ppd->link_speed_supported) {
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@@ -7892,6 +7907,7 @@ static void serdes_7322_los_enable(struct qib_pportdata *ppd, int enable)
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static int serdes_7322_init(struct qib_pportdata *ppd)
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{
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int ret = 0;
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+
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if (ppd->dd->cspec->r1)
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ret = serdes_7322_init_old(ppd);
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else
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@@ -8307,8 +8323,8 @@ static void force_h1(struct qib_pportdata *ppd)
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static int qib_r_grab(struct qib_devdata *dd)
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{
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- u64 val;
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- val = SJA_EN;
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+ u64 val = SJA_EN;
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+
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qib_write_kreg(dd, kr_r_access, val);
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qib_read_kreg32(dd, kr_scratch);
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return 0;
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@@ -8321,6 +8337,7 @@ static int qib_r_wait_for_rdy(struct qib_devdata *dd)
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{
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u64 val;
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int timeout;
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+
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for (timeout = 0; timeout < 100 ; ++timeout) {
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val = qib_read_kreg32(dd, kr_r_access);
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if (val & R_RDY)
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@@ -8348,6 +8365,7 @@ static int qib_r_shift(struct qib_devdata *dd, int bisten,
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}
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if (inp) {
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int tdi = inp[pos >> 3] >> (pos & 7);
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+
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val |= ((tdi & 1) << R_TDI_LSB);
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}
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qib_write_kreg(dd, kr_r_access, val);
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