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@@ -1,147 +0,0 @@
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-/*
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License version 2 as published
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- * by the Free Software Foundation.
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- *
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- * Copyright (C) 2010 John Crispin <john@phrozen.org>
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- * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
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- */
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-
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-#include <linux/init.h>
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-#include <linux/io.h>
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-#include <linux/ioport.h>
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-#include <linux/pm.h>
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-#include <linux/export.h>
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-#include <linux/delay.h>
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-#include <linux/of_address.h>
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-#include <linux/of_platform.h>
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-#include <linux/reset-controller.h>
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-
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-#include <asm/reboot.h>
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-
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-#include <lantiq_soc.h>
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-
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-#include "../prom.h"
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-
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-/* reset request register */
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-#define RCU_RST_REQ 0x0010
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-/* reset status register */
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-#define RCU_RST_STAT 0x0014
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-
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-/* xbar BE flag */
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-#define RCU_AHB_ENDIAN 0x004C
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-#define RCU_VR9_BE_AHB1S 0x00000008
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-
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-/* reboot bit */
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-#define RCU_RD_GPHY0_XRX200 BIT(31)
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-#define RCU_RD_SRST BIT(30)
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-#define RCU_RD_GPHY1_XRX200 BIT(29)
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-
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-/* reset cause */
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-#define RCU_STAT_SHIFT 26
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-/* boot selection */
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-#define RCU_BOOT_SEL(x) ((x >> 18) & 0x7)
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-#define RCU_BOOT_SEL_XRX200(x) (((x >> 17) & 0xf) | ((x >> 8) & 0x10))
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-
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-/* dwc2 USB configuration registers */
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-#define RCU_USB1CFG 0x0018
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-#define RCU_USB2CFG 0x0034
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-
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-/* USB DMA endianness bits */
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-#define RCU_USBCFG_HDSEL_BIT BIT(11)
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-#define RCU_USBCFG_HOST_END_BIT BIT(10)
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-#define RCU_USBCFG_SLV_END_BIT BIT(9)
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-
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-/* USB reset bits */
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-#define RCU_USBRESET 0x0010
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-
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-#define USBRESET_BIT BIT(4)
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-
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-#define RCU_USBRESET2 0x0048
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-
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-#define USB1RESET_BIT BIT(4)
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-#define USB2RESET_BIT BIT(5)
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-
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-#define RCU_CFG1A 0x0038
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-#define RCU_CFG1B 0x003C
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-
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-/* USB PMU devices */
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-#define PMU_AHBM BIT(15)
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-#define PMU_USB0 BIT(6)
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-#define PMU_USB1 BIT(27)
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-
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-/* USB PHY PMU devices */
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-#define PMU_USB0_P BIT(0)
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-#define PMU_USB1_P BIT(26)
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-
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-/* remapped base addr of the reset control unit */
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-static void __iomem *ltq_rcu_membase;
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-static struct device_node *ltq_rcu_np;
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-
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-static void ltq_rcu_w32(uint32_t val, uint32_t reg_off)
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-{
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- ltq_w32(val, ltq_rcu_membase + reg_off);
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-}
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-
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-static uint32_t ltq_rcu_r32(uint32_t reg_off)
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-{
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- return ltq_r32(ltq_rcu_membase + reg_off);
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-}
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-
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-static void ltq_machine_restart(char *command)
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-{
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- u32 val = ltq_rcu_r32(RCU_RST_REQ);
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-
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- if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200"))
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- val |= RCU_RD_GPHY1_XRX200 | RCU_RD_GPHY0_XRX200;
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-
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- val |= RCU_RD_SRST;
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-
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- local_irq_disable();
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- ltq_rcu_w32(val, RCU_RST_REQ);
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- unreachable();
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-}
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-
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-static void ltq_machine_halt(void)
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-{
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- local_irq_disable();
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- unreachable();
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-}
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-
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-static void ltq_machine_power_off(void)
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-{
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- local_irq_disable();
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- unreachable();
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-}
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-
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-static int __init mips_reboot_setup(void)
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-{
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- struct resource res;
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-
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- ltq_rcu_np = of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway");
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- if (!ltq_rcu_np)
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- ltq_rcu_np = of_find_compatible_node(NULL, NULL,
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- "lantiq,rcu-xrx200");
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-
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- /* check if all the reset register range is available */
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- if (!ltq_rcu_np)
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- panic("Failed to load reset resources from devicetree");
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-
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- if (of_address_to_resource(ltq_rcu_np, 0, &res))
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- panic("Failed to get rcu memory range");
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-
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- if (!request_mem_region(res.start, resource_size(&res), res.name))
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- pr_err("Failed to request rcu memory");
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-
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- ltq_rcu_membase = ioremap_nocache(res.start, resource_size(&res));
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- if (!ltq_rcu_membase)
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- panic("Failed to remap core memory");
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-
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- _machine_restart = ltq_machine_restart;
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- _machine_halt = ltq_machine_halt;
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- pm_power_off = ltq_machine_power_off;
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-
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- return 0;
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-}
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-
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-arch_initcall(mips_reboot_setup);
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