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@@ -17,6 +17,7 @@
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/dts-v1/;
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#include <dt-bindings/reset/altr,rst-mgr-s10.h>
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#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/clock/stratix10-clock.h>
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/ {
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compatible = "altr,socfpga-stratix10";
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@@ -92,9 +93,32 @@
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interrupt-parent = <&intc>;
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ranges = <0 0 0 0xffffffff>;
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- clkmgr@ffd1000 {
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- compatible = "altr,clk-mgr";
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+ clkmgr: clock-controller@ffd10000 {
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+ compatible = "intel,stratix10-clkmgr";
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reg = <0xffd10000 0x1000>;
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+ #clock-cells = <1>;
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+ };
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+
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+ clocks {
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+ cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ };
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+
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+ cb_intosc_ls_clk: cb-intosc-ls-clk {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ };
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+
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+ f2s_free_clk: f2s-free-clk {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ };
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+
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+ osc1: osc1 {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ };
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};
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gmac0: ethernet@ff800000 {
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@@ -105,6 +129,8 @@
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mac-address = [00 00 00 00 00 00];
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resets = <&rst EMAC0_RESET>;
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reset-names = "stmmaceth";
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+ clocks = <&clkmgr STRATIX10_EMAC0_CLK>;
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+ clock-names = "stmmaceth";
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status = "disabled";
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};
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@@ -116,6 +142,8 @@
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mac-address = [00 00 00 00 00 00];
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resets = <&rst EMAC1_RESET>;
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reset-names = "stmmaceth";
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+ clocks = <&clkmgr STRATIX10_EMAC1_CLK>;
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+ clock-names = "stmmaceth";
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status = "disabled";
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};
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@@ -127,6 +155,8 @@
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mac-address = [00 00 00 00 00 00];
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resets = <&rst EMAC2_RESET>;
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reset-names = "stmmaceth";
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+ clocks = <&clkmgr STRATIX10_EMAC2_CLK>;
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+ clock-names = "stmmaceth";
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status = "disabled";
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};
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@@ -229,6 +259,9 @@
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fifo-depth = <0x400>;
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resets = <&rst SDMMC_RESET>;
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reset-names = "reset";
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+ clocks = <&clkmgr STRATIX10_L4_MP_CLK>,
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+ <&clkmgr STRATIX10_SDMMC_CLK>;
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+ clock-names = "biu", "ciu";
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status = "disabled";
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};
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@@ -288,24 +321,32 @@
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compatible = "snps,dw-apb-timer";
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interrupts = <0 113 4>;
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reg = <0xffc03000 0x100>;
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+ clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
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+ clock-names = "timer";
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};
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timer1: timer1@ffc03100 {
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compatible = "snps,dw-apb-timer";
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interrupts = <0 114 4>;
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reg = <0xffc03100 0x100>;
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+ clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
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+ clock-names = "timer";
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};
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timer2: timer2@ffd00000 {
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compatible = "snps,dw-apb-timer";
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interrupts = <0 115 4>;
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reg = <0xffd00000 0x100>;
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+ clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
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+ clock-names = "timer";
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};
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timer3: timer3@ffd00100 {
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compatible = "snps,dw-apb-timer";
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interrupts = <0 116 4>;
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reg = <0xffd00100 0x100>;
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+ clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
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+ clock-names = "timer";
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};
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uart0: serial0@ffc02000 {
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@@ -315,6 +356,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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resets = <&rst UART0_RESET>;
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+ clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
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status = "disabled";
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};
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@@ -325,6 +367,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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resets = <&rst UART1_RESET>;
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+ clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
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status = "disabled";
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};
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