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@@ -73,6 +73,7 @@
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#define SUNXI_MUSB_FL_PHY_ON 4
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#define SUNXI_MUSB_FL_PHY_ON 4
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#define SUNXI_MUSB_FL_HAS_SRAM 5
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#define SUNXI_MUSB_FL_HAS_SRAM 5
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#define SUNXI_MUSB_FL_HAS_RESET 6
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#define SUNXI_MUSB_FL_HAS_RESET 6
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+#define SUNXI_MUSB_FL_NO_CONFIGDATA 7
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/* Our read/write methods need access and do not get passed in a musb ref :| */
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/* Our read/write methods need access and do not get passed in a musb ref :| */
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static struct musb *sunxi_musb;
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static struct musb *sunxi_musb;
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@@ -370,6 +371,8 @@ static u32 sunxi_musb_busctl_offset(u8 epnum, u16 offset)
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static u8 sunxi_musb_readb(const void __iomem *addr, unsigned offset)
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static u8 sunxi_musb_readb(const void __iomem *addr, unsigned offset)
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{
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{
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+ struct sunxi_glue *glue;
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+
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if (addr == sunxi_musb->mregs) {
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if (addr == sunxi_musb->mregs) {
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/* generic control or fifo control reg access */
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/* generic control or fifo control reg access */
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switch (offset) {
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switch (offset) {
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@@ -392,6 +395,12 @@ static u8 sunxi_musb_readb(const void __iomem *addr, unsigned offset)
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case MUSB_RXFIFOSZ:
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case MUSB_RXFIFOSZ:
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return readb(addr + SUNXI_MUSB_RXFIFOSZ);
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return readb(addr + SUNXI_MUSB_RXFIFOSZ);
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case MUSB_CONFIGDATA + 0x10: /* See musb_read_configdata() */
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case MUSB_CONFIGDATA + 0x10: /* See musb_read_configdata() */
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+ glue = dev_get_drvdata(sunxi_musb->controller->parent);
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+ /* A33 saves a reg, and we get to hardcode this */
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+ if (test_bit(SUNXI_MUSB_FL_NO_CONFIGDATA,
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+ &glue->flags))
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+ return 0xde;
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+
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return readb(addr + SUNXI_MUSB_CONFIGDATA);
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return readb(addr + SUNXI_MUSB_CONFIGDATA);
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/* Offset for these is fixed by sunxi_musb_busctl_offset() */
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/* Offset for these is fixed by sunxi_musb_busctl_offset() */
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case SUNXI_MUSB_TXFUNCADDR:
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case SUNXI_MUSB_TXFUNCADDR:
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@@ -643,6 +652,11 @@ static int sunxi_musb_probe(struct platform_device *pdev)
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if (of_device_is_compatible(np, "allwinner,sun6i-a31-musb"))
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if (of_device_is_compatible(np, "allwinner,sun6i-a31-musb"))
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set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);
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set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);
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+ if (of_device_is_compatible(np, "allwinner,sun8i-a33-musb")) {
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+ set_bit(SUNXI_MUSB_FL_HAS_RESET, &glue->flags);
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+ set_bit(SUNXI_MUSB_FL_NO_CONFIGDATA, &glue->flags);
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+ }
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+
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glue->clk = devm_clk_get(&pdev->dev, NULL);
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glue->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(glue->clk)) {
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if (IS_ERR(glue->clk)) {
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dev_err(&pdev->dev, "Error getting clock: %ld\n",
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dev_err(&pdev->dev, "Error getting clock: %ld\n",
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@@ -723,6 +737,7 @@ static int sunxi_musb_remove(struct platform_device *pdev)
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static const struct of_device_id sunxi_musb_match[] = {
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static const struct of_device_id sunxi_musb_match[] = {
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{ .compatible = "allwinner,sun4i-a10-musb", },
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{ .compatible = "allwinner,sun4i-a10-musb", },
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{ .compatible = "allwinner,sun6i-a31-musb", },
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{ .compatible = "allwinner,sun6i-a31-musb", },
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+ { .compatible = "allwinner,sun8i-a33-musb", },
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{}
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{}
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};
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};
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