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@@ -349,6 +349,31 @@ static void serverworks_fixup_ht1000(struct pci_dev *pdev)
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pci_write_config_byte(pdev, 0x5A, btr);
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}
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+static int serverworks_fixup(struct pci_dev *pdev)
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+{
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+ int rc = 0;
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+
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+ /* Force master latency timer to 64 PCI clocks */
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+ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
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+
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+ switch (pdev->device) {
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+ case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE:
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+ rc = serverworks_fixup_osb4(pdev);
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+ break;
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+ case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
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+ ata_pci_bmdma_clear_simplex(pdev);
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+ /* fall through */
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+ case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
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+ case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
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+ rc = serverworks_fixup_csb(pdev);
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+ break;
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+ case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
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+ serverworks_fixup_ht1000(pdev);
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+ break;
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+ }
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+
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+ return rc;
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+}
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static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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@@ -386,13 +411,12 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id
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if (rc)
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return rc;
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- /* Force master latency timer to 64 PCI clocks */
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- pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
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+ rc = serverworks_fixup(pdev);
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/* OSB4 : South Bridge and IDE */
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if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
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/* Select non UDMA capable OSB4 if we can't do fixups */
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- if ( serverworks_fixup_osb4(pdev) < 0)
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+ if (rc < 0)
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ppi[0] = &info[1];
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}
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/* setup CSB5/CSB6 : South Bridge and IDE option RAID */
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@@ -402,19 +426,13 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id
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/* If the returned btr is the newer revision then
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select the right info block */
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- if (serverworks_fixup_csb(pdev) == 3)
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+ if (rc == 3)
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ppi[0] = &info[3];
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/* Is this the 3rd channel CSB6 IDE ? */
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if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)
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ppi[1] = &ata_dummy_port_info;
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}
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- /* setup HT1000E */
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- else if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
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- serverworks_fixup_ht1000(pdev);
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-
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- if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
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- ata_pci_bmdma_clear_simplex(pdev);
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return ata_pci_bmdma_init_one(pdev, ppi, &serverworks_sht, NULL, 0);
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}
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@@ -429,24 +447,7 @@ static int serverworks_reinit_one(struct pci_dev *pdev)
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if (rc)
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return rc;
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- /* Force master latency timer to 64 PCI clocks */
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- pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
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-
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- switch (pdev->device) {
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- case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE:
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- serverworks_fixup_osb4(pdev);
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- break;
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- case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
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- ata_pci_bmdma_clear_simplex(pdev);
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- /* fall through */
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- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
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- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
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- serverworks_fixup_csb(pdev);
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- break;
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- case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
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- serverworks_fixup_ht1000(pdev);
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- break;
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- }
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+ (void)serverworks_fixup(pdev);
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ata_host_resume(host);
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return 0;
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