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@@ -333,6 +333,20 @@ static struct radeon_asic_ring r300_gfx_ring = {
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.set_wptr = &r100_gfx_set_wptr,
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};
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+static struct radeon_asic_ring rv515_gfx_ring = {
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+ .ib_execute = &r100_ring_ib_execute,
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+ .emit_fence = &r300_fence_ring_emit,
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+ .emit_semaphore = &r100_semaphore_ring_emit,
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+ .cs_parse = &r300_cs_parse,
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+ .ring_start = &rv515_ring_start,
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+ .ring_test = &r100_ring_test,
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+ .ib_test = &r100_ib_test,
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+ .is_lockup = &r100_gpu_is_lockup,
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+ .get_rptr = &r100_gfx_get_rptr,
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+ .get_wptr = &r100_gfx_get_wptr,
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+ .set_wptr = &r100_gfx_set_wptr,
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+};
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+
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static struct radeon_asic r300_asic = {
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.init = &r300_init,
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.fini = &r300_fini,
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@@ -748,7 +762,7 @@ static struct radeon_asic rv515_asic = {
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.set_page = &rv370_pcie_gart_set_page,
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},
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.ring = {
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- [RADEON_RING_TYPE_GFX_INDEX] = &r300_gfx_ring
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+ [RADEON_RING_TYPE_GFX_INDEX] = &rv515_gfx_ring
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},
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.irq = {
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.set = &rs600_irq_set,
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@@ -814,7 +828,7 @@ static struct radeon_asic r520_asic = {
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.set_page = &rv370_pcie_gart_set_page,
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},
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.ring = {
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- [RADEON_RING_TYPE_GFX_INDEX] = &r300_gfx_ring
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+ [RADEON_RING_TYPE_GFX_INDEX] = &rv515_gfx_ring
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},
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.irq = {
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.set = &rs600_irq_set,
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