|
@@ -233,7 +233,7 @@ static void at91_pm_set_standby(void (*at91_standby)(void))
|
|
*/
|
|
*/
|
|
static void at91rm9200_standby(void)
|
|
static void at91rm9200_standby(void)
|
|
{
|
|
{
|
|
- u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
|
|
|
|
|
|
+ u32 lpr = at91_ramc_read(0, AT91_MC_SDRAMC_LPR);
|
|
|
|
|
|
asm volatile(
|
|
asm volatile(
|
|
"b 1f\n\t"
|
|
"b 1f\n\t"
|
|
@@ -244,8 +244,8 @@ static void at91rm9200_standby(void)
|
|
" mcr p15, 0, %0, c7, c0, 4\n\t"
|
|
" mcr p15, 0, %0, c7, c0, 4\n\t"
|
|
" str %5, [%1, %2]"
|
|
" str %5, [%1, %2]"
|
|
:
|
|
:
|
|
- : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
|
|
|
|
- "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
|
|
|
|
|
|
+ : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91_MC_SDRAMC_LPR),
|
|
|
|
+ "r" (1), "r" (AT91_MC_SDRAMC_SRR),
|
|
"r" (lpr));
|
|
"r" (lpr));
|
|
}
|
|
}
|
|
|
|
|
|
@@ -414,7 +414,7 @@ void __init at91rm9200_pm_init(void)
|
|
/*
|
|
/*
|
|
* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
|
|
* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
|
|
*/
|
|
*/
|
|
- at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
|
|
|
|
|
|
+ at91_ramc_write(0, AT91_MC_SDRAMC_LPR, 0);
|
|
|
|
|
|
at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
|
|
at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
|
|
at91_pm_data.memctrl = AT91_MEMCTRL_MC;
|
|
at91_pm_data.memctrl = AT91_MEMCTRL_MC;
|