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@@ -176,6 +176,14 @@ enum sprd_dma_int_type {
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SPRD_DMA_CFGERR_INT,
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};
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+/* dma data width values */
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+enum sprd_dma_datawidth {
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+ SPRD_DMA_DATAWIDTH_1_BYTE,
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+ SPRD_DMA_DATAWIDTH_2_BYTES,
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+ SPRD_DMA_DATAWIDTH_4_BYTES,
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+ SPRD_DMA_DATAWIDTH_8_BYTES,
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+};
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+
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/* dma channel hardware configuration */
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struct sprd_dma_chn_hw {
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u32 pause;
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@@ -604,15 +612,15 @@ static int sprd_dma_config(struct dma_chan *chan, struct sprd_dma_desc *sdesc,
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u32 fix_mode = 0, fix_en = 0;
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if (IS_ALIGNED(len, 4)) {
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- datawidth = 2;
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+ datawidth = SPRD_DMA_DATAWIDTH_4_BYTES;
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src_step = SPRD_DMA_WORD_STEP;
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des_step = SPRD_DMA_WORD_STEP;
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} else if (IS_ALIGNED(len, 2)) {
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- datawidth = 1;
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+ datawidth = SPRD_DMA_DATAWIDTH_2_BYTES;
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src_step = SPRD_DMA_SHORT_STEP;
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des_step = SPRD_DMA_SHORT_STEP;
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} else {
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- datawidth = 0;
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+ datawidth = SPRD_DMA_DATAWIDTH_1_BYTE;
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src_step = SPRD_DMA_BYTE_STEP;
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des_step = SPRD_DMA_BYTE_STEP;
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}
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