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@@ -34,17 +34,17 @@
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*/
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#ifdef CONFIG_X86_64
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/* Mask off the address space ID and SME encryption bits. */
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-#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull)
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-#define CR3_PCID_MASK 0xFFFull
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-#define CR3_NOFLUSH (1UL << 63)
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+#define CR3_ADDR_MASK __sme_clr(0x7FFFFFFFFFFFF000ull)
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+#define CR3_PCID_MASK 0xFFFull
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+#define CR3_NOFLUSH BIT_ULL(63)
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#else
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/*
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* CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save
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* a tiny bit of code size by setting all the bits.
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*/
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-#define CR3_ADDR_MASK 0xFFFFFFFFull
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-#define CR3_PCID_MASK 0ull
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-#define CR3_NOFLUSH 0
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+#define CR3_ADDR_MASK 0xFFFFFFFFull
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+#define CR3_PCID_MASK 0ull
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+#define CR3_NOFLUSH 0
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#endif
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#endif /* _ASM_X86_PROCESSOR_FLAGS_H */
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