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@@ -140,16 +140,11 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
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* The _caller variety takes a __builtin_return_address(0) value for
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* /proc/vmalloc to use - and should only be used in non-inline functions.
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*/
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-extern void __iomem *__arm_ioremap_pfn_caller(unsigned long, unsigned long,
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- size_t, unsigned int, void *);
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extern void __iomem *__arm_ioremap_caller(phys_addr_t, size_t, unsigned int,
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void *);
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-
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extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int);
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-extern void __iomem *__arm_ioremap(phys_addr_t, size_t, unsigned int);
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extern void __iomem *__arm_ioremap_exec(phys_addr_t, size_t, bool cached);
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extern void __iounmap(volatile void __iomem *addr);
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-extern void __arm_iounmap(volatile void __iomem *addr);
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extern void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t,
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unsigned int, void *);
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@@ -321,21 +316,24 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
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static inline void memset_io(volatile void __iomem *dst, unsigned c,
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size_t count)
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{
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- memset((void __force *)dst, c, count);
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+ extern void mmioset(void *, unsigned int, size_t);
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+ mmioset((void __force *)dst, c, count);
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}
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#define memset_io(dst,c,count) memset_io(dst,c,count)
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static inline void memcpy_fromio(void *to, const volatile void __iomem *from,
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size_t count)
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{
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- memcpy(to, (const void __force *)from, count);
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+ extern void mmiocpy(void *, const void *, size_t);
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+ mmiocpy(to, (const void __force *)from, count);
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}
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#define memcpy_fromio(to,from,count) memcpy_fromio(to,from,count)
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static inline void memcpy_toio(volatile void __iomem *to, const void *from,
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size_t count)
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{
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- memcpy((void __force *)to, from, count);
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+ extern void mmiocpy(void *, const void *, size_t);
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+ mmiocpy((void __force *)to, from, count);
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}
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#define memcpy_toio(to,from,count) memcpy_toio(to,from,count)
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@@ -348,18 +346,61 @@ static inline void memcpy_toio(volatile void __iomem *to, const void *from,
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#endif /* readl */
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/*
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- * ioremap and friends.
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+ * ioremap() and friends.
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+ *
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+ * ioremap() takes a resource address, and size. Due to the ARM memory
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+ * types, it is important to use the correct ioremap() function as each
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+ * mapping has specific properties.
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+ *
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+ * Function Memory type Cacheability Cache hint
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+ * ioremap() Device n/a n/a
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+ * ioremap_nocache() Device n/a n/a
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+ * ioremap_cache() Normal Writeback Read allocate
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+ * ioremap_wc() Normal Non-cacheable n/a
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+ * ioremap_wt() Normal Non-cacheable n/a
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+ *
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+ * All device mappings have the following properties:
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+ * - no access speculation
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+ * - no repetition (eg, on return from an exception)
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+ * - number, order and size of accesses are maintained
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+ * - unaligned accesses are "unpredictable"
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+ * - writes may be delayed before they hit the endpoint device
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*
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- * ioremap takes a PCI memory address, as specified in
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- * Documentation/io-mapping.txt.
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+ * ioremap_nocache() is the same as ioremap() as there are too many device
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+ * drivers using this for device registers, and documentation which tells
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+ * people to use it for such for this to be any different. This is not a
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+ * safe fallback for memory-like mappings, or memory regions where the
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+ * compiler may generate unaligned accesses - eg, via inlining its own
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+ * memcpy.
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*
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+ * All normal memory mappings have the following properties:
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+ * - reads can be repeated with no side effects
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+ * - repeated reads return the last value written
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+ * - reads can fetch additional locations without side effects
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+ * - writes can be repeated (in certain cases) with no side effects
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+ * - writes can be merged before accessing the target
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+ * - unaligned accesses can be supported
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+ * - ordering is not guaranteed without explicit dependencies or barrier
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+ * instructions
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+ * - writes may be delayed before they hit the endpoint memory
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+ *
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+ * The cache hint is only a performance hint: CPUs may alias these hints.
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+ * Eg, a CPU not implementing read allocate but implementing write allocate
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+ * will provide a write allocate mapping instead.
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*/
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-#define ioremap(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
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-#define ioremap_nocache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
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-#define ioremap_cache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
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-#define ioremap_wc(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_WC)
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-#define ioremap_wt(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
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-#define iounmap __arm_iounmap
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+void __iomem *ioremap(resource_size_t res_cookie, size_t size);
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+#define ioremap ioremap
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+#define ioremap_nocache ioremap
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+
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+void __iomem *ioremap_cache(resource_size_t res_cookie, size_t size);
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+#define ioremap_cache ioremap_cache
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+
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+void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size);
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+#define ioremap_wc ioremap_wc
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+#define ioremap_wt ioremap_wc
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+
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+void iounmap(volatile void __iomem *iomem_cookie);
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+#define iounmap iounmap
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/*
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* io{read,write}{16,32}be() macros
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