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drm/i915: Don't read 'HEAD' MMIO register in LRC mode

The logical ring code was updating the software ring 'head' value
by reading the hardware 'HEAD' register. In LRC mode, this is not
valid as the hardware is not necessarily executing the same context
that is being processed by the software. Thus reading the h/w HEAD
could put an unrelated (undefined, effectively random) value into
the s/w 'head' -- A Bad Thing for the free space calculations.

Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Dave Gordon 10 năm trước cách đây
mục cha
commit
d65621c496
1 tập tin đã thay đổi với 0 bổ sung1 xóa
  1. 0 1
      drivers/gpu/drm/i915/intel_lrc.c

+ 0 - 1
drivers/gpu/drm/i915/intel_lrc.c

@@ -986,7 +986,6 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 	end = jiffies + 60 * HZ;
 	end = jiffies + 60 * HZ;
 
 
 	do {
 	do {
-		ringbuf->head = I915_READ_HEAD(ring);
 		ringbuf->space = intel_ring_space(ringbuf);
 		ringbuf->space = intel_ring_space(ringbuf);
 		if (ringbuf->space >= bytes) {
 		if (ringbuf->space >= bytes) {
 			ret = 0;
 			ret = 0;