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@@ -134,7 +134,7 @@ struct brcmnand_controller {
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dma_addr_t dma_pa;
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/* in-memory cache of the FLASH_CACHE, used only for some commands */
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- u32 flash_cache[FC_WORDS];
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+ u8 flash_cache[FC_BYTES];
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/* Controller revision details */
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const u16 *reg_offsets;
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@@ -1188,6 +1188,8 @@ static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command,
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if (native_cmd == CMD_PARAMETER_READ ||
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native_cmd == CMD_PARAMETER_CHANGE_COL) {
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+ /* Copy flash cache word-wise */
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+ u32 *flash_cache = (u32 *)ctrl->flash_cache;
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int i;
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brcmnand_soc_data_bus_prepare(ctrl->soc);
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@@ -1197,7 +1199,11 @@ static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command,
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* SECTOR_SIZE_1K may invalidate it
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*/
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for (i = 0; i < FC_WORDS; i++)
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- ctrl->flash_cache[i] = brcmnand_read_fc(ctrl, i);
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+ /*
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+ * Flash cache is big endian for parameter pages, at
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+ * least on STB SoCs
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+ */
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+ flash_cache[i] = be32_to_cpu(brcmnand_read_fc(ctrl, i));
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brcmnand_soc_data_bus_unprepare(ctrl->soc);
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@@ -1250,8 +1256,7 @@ static uint8_t brcmnand_read_byte(struct mtd_info *mtd)
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if (host->last_byte > 0 && offs == 0)
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chip->cmdfunc(mtd, NAND_CMD_RNDOUT, addr, -1);
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- ret = ctrl->flash_cache[offs >> 2] >>
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- (24 - ((offs & 0x03) << 3));
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+ ret = ctrl->flash_cache[offs];
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break;
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case NAND_CMD_GET_FEATURES:
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if (host->last_byte >= ONFI_SUBFEATURE_PARAM_LEN) {
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