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+ fpga_irq_init(base, node->name, IRQ_SIC_START, parent_irq, valid_mask,
|
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fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
|
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fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
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writel(clear_mask, base + IRQ_ENABLE_CLEAR);
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writel(clear_mask, base + IRQ_ENABLE_CLEAR);
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writel(clear_mask, base + FIQ_ENABLE_CLEAR);
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writel(clear_mask, base + FIQ_ENABLE_CLEAR);
|