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@@ -549,7 +549,7 @@ static const struct pinctrl_pin_desc atlas7_ioc_pads[] = {
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PINCTRL_PIN(163, "jtag_trstn"),
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PINCTRL_PIN(163, "jtag_trstn"),
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};
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};
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-struct atlas7_pad_config atlas7_ioc_pad_confs[] = {
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+static struct atlas7_pad_config atlas7_ioc_pad_confs[] = {
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/* The Configuration of IOC_RTC Pads */
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/* The Configuration of IOC_RTC Pads */
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PADCONF(0, 3, 0x0, 0x100, 0x200, -1, 0, 0, 0, 0),
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PADCONF(0, 3, 0x0, 0x100, 0x200, -1, 0, 0, 0, 0),
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PADCONF(1, 3, 0x0, 0x100, 0x200, -1, 4, 2, 2, 0),
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PADCONF(1, 3, 0x0, 0x100, 0x200, -1, 4, 2, 2, 0),
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@@ -1002,7 +1002,7 @@ static const unsigned int vi_vip1_high8bit_pins[] = { 82, 83, 84, 103, 104,
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105, 106, 107, 102, 97, 98, };
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105, 106, 107, 102, 97, 98, };
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/* definition of pin group table */
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/* definition of pin group table */
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-struct atlas7_pin_group altas7_pin_groups[] = {
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+static struct atlas7_pin_group altas7_pin_groups[] = {
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GROUP("gnss_gpio_grp", gnss_gpio_pins),
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GROUP("gnss_gpio_grp", gnss_gpio_pins),
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GROUP("lcd_vip_gpio_grp", lcd_vip_gpio_pins),
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GROUP("lcd_vip_gpio_grp", lcd_vip_gpio_pins),
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GROUP("sdio_i2s_gpio_grp", sdio_i2s_gpio_pins),
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GROUP("sdio_i2s_gpio_grp", sdio_i2s_gpio_pins),
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@@ -4764,7 +4764,7 @@ static struct atlas7_pmx_func atlas7_pmx_functions[] = {
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&vi_vip1_high8bit_grp_mux),
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&vi_vip1_high8bit_grp_mux),
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};
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};
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-struct atlas7_pinctrl_data atlas7_ioc_data = {
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+static struct atlas7_pinctrl_data atlas7_ioc_data = {
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.pads = (struct pinctrl_pin_desc *)atlas7_ioc_pads,
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.pads = (struct pinctrl_pin_desc *)atlas7_ioc_pads,
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.pads_cnt = ARRAY_SIZE(atlas7_ioc_pads),
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.pads_cnt = ARRAY_SIZE(atlas7_ioc_pads),
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.grps = (struct atlas7_pin_group *)altas7_pin_groups,
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.grps = (struct atlas7_pin_group *)altas7_pin_groups,
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