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@@ -4548,6 +4548,10 @@ static int valleyview_calc_cdclk(struct drm_i915_private *dev_priv,
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int vco = valleyview_get_vco(dev_priv);
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int freq_320 = (vco << 1) % 320000 != 0 ? 333333 : 320000;
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+ /* FIXME: Punit isn't quite ready yet */
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+ if (IS_CHERRYVIEW(dev_priv->dev))
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+ return 400000;
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+
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/*
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* Really only a few cases to deal with, as only 4 CDclks are supported:
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* 200MHz
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@@ -5283,6 +5287,10 @@ static int valleyview_get_display_clock_speed(struct drm_device *dev)
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u32 val;
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int divider;
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+ /* FIXME: Punit isn't quite ready yet */
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+ if (IS_CHERRYVIEW(dev))
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+ return 400000;
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+
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mutex_lock(&dev_priv->dpio_lock);
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val = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
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mutex_unlock(&dev_priv->dpio_lock);
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